forked from OSchip/llvm-project
[x86] Tighten the assertions to document that canonicalization has
actually removed all but a *very* small number of choices for v2i64. Also remove dead code handling cases that simply cannot arise. llvm-svn: 229670
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@ -8618,8 +8618,10 @@ static SDValue lowerV2I64VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
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DAG.getNode(X86ISD::PSHUFD, SDLoc(Op), MVT::v4i32, V1,
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getV4X86ShuffleImm8ForMask(WidenedMask, DAG)));
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}
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assert((Mask[0] >= 2) + (Mask[1] >= 2) == 1 &&
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"Canonicalization ensures we only see shuffles with two inputs.");
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assert(Mask[0] != -1 && "No undef lanes in multi-input v2 shuffles!");
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assert(Mask[1] != -1 && "No undef lanes in multi-input v2 shuffles!");
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assert(Mask[0] < 2 && "We sort V1 to be the first input.");
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assert(Mask[1] >= 2 && "We sort V2 to be the second input.");
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// Try to use shift instructions.
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if (SDValue Shift =
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@ -8633,8 +8635,7 @@ static SDValue lowerV2I64VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
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return Insertion;
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// Try inverting the insertion since for v2 masks it is easy to do and we
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// can't reliably sort the mask one way or the other.
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int InverseMask[2] = {Mask[0] < 0 ? -1 : (Mask[0] ^ 2),
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Mask[1] < 0 ? -1 : (Mask[1] ^ 2)};
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int InverseMask[2] = {Mask[0] ^ 2, Mask[1] ^ 2};
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if (SDValue Insertion = lowerVectorShuffleAsElementInsertion(
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MVT::v2i64, DL, V2, V1, InverseMask, Subtarget, DAG))
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return Insertion;
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