Do not allow switch statements in loop latches

In r248701 "Allow switch instructions in SCoPs" support for switch statements
has been introduced, but support for switch statements in loop latches was
incomplete. This change completely disables switch statements in loop latches.

The original commit changed addLoopBoundsToHeaderDomain to support non-branch
terminator instructions, but this change was incorrect: it added a check for
BI != null to the if-branch of a condition, but BI was used in the else branch
es well. As a result, when a non-branch terminator instruction is encounted a
nullptr dereference is triggered. Due to missing test coverage, this bug was
overlooked.

r249273 "[FIX] Approximate non-affine loops correctly" added code to disallow
switch statements for non-affine loops, if they appear in either a loop latch
or a loop exit. We adapt this code to now prohibit switch statements in
loop latches even if the control condition is affine.

We could possibly add support for switch statements in loop latches, but such
support should be evaluated and tested separately.

This fixes llvm.org/PR30952

Reported-by: Eli Friedman <efriedma@codeaurora.org>
llvm-svn: 286426
This commit is contained in:
Tobias Grosser 2016-11-10 05:20:29 +00:00
parent 924c5ec472
commit bbaeda3fe5
3 changed files with 32 additions and 9 deletions

View File

@ -341,16 +341,16 @@ bool ScopDetection::isValidSwitch(BasicBlock &BB, SwitchInst *SI,
Loop *L = LI->getLoopFor(&BB);
const SCEV *ConditionSCEV = SE->getSCEVAtScope(Condition, L);
if (IsLoopBranch && L->isLoopLatch(&BB))
return false;
if (isAffine(ConditionSCEV, L, Context))
return true;
if (!IsLoopBranch && AllowNonAffineSubRegions &&
if (AllowNonAffineSubRegions &&
addOverApproximatedRegion(RI->getRegionFor(&BB), Context))
return true;
if (IsLoopBranch)
return false;
return invalid<ReportNonAffBranch>(Context, /*Assert=*/true, &BB,
ConditionSCEV, ConditionSCEV, SI);
}
@ -359,6 +359,10 @@ bool ScopDetection::isValidBranch(BasicBlock &BB, BranchInst *BI,
Value *Condition, bool IsLoopBranch,
DetectionContext &Context) const {
// Constant integer conditions are always affine.
if (isa<ConstantInt>(Condition))
return true;
if (BinaryOperator *BinOp = dyn_cast<BinaryOperator>(Condition)) {
auto Opcode = BinOp->getOpcode();
if (Opcode == Instruction::And || Opcode == Instruction::Or) {
@ -425,10 +429,6 @@ bool ScopDetection::isValidCFG(BasicBlock &BB, bool IsLoopBranch,
if (isa<UndefValue>(Condition))
return invalid<ReportUndefCond>(Context, /*Assert=*/true, TI, &BB);
// Constant integer conditions are always affine.
if (isa<ConstantInt>(Condition))
return true;
if (BranchInst *BI = dyn_cast<BranchInst>(TI))
return isValidBranch(BB, BI, Condition, IsLoopBranch, Context);

View File

@ -2792,7 +2792,9 @@ bool Scop::addLoopBoundsToHeaderDomain(Loop *L, LoopInfo &LI) {
TerminatorInst *TI = LatchBB->getTerminator();
BranchInst *BI = dyn_cast<BranchInst>(TI);
if (BI && BI->isUnconditional())
assert(BI && "Only branch instructions allowed in loop latches");
if (BI->isUnconditional())
BackedgeCondition = isl_set_copy(LatchBBDom);
else {
SmallVector<isl_set *, 8> ConditionSets;

View File

@ -0,0 +1,21 @@
; RUN: opt %loadPolly -polly-detect -analyze < %s | FileCheck %s
; CHECK-NOT: Valid
; Verify that we do not detect loops where the loop latch is a switch statement.
; Such loops are not yet supported by Polly.
define void @f() {
b:
br label %d
d:
switch i8 0, label %e [
i8 71, label %d
i8 56, label %d
]
e:
ret void
}