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Start using tablegen'd instruction enum list 

llvm-svn: 7542
This commit is contained in:
Chris Lattner 2003-08-03 21:57:05 +00:00
parent 637eebbfc1
commit bb8bdc04a7
1 changed files with 3 additions and 10 deletions
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13
llvm/lib/Target/X86/X86.h
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@ -47,15 +47,8 @@ Pass *createEmitX86CodeToMemory();
// //
#include "X86GenRegisterNames.inc" #include "X86GenRegisterNames.inc"
/// X86 namespace - This namespace contains all of the register and opcode enums // Defines symbolic names for the X86 instructions.
/// used by the X86 backend. //
/// #include "X86GenInstrNames.inc"
namespace X86 {
// This defines a large number of symbolic names for X86 instruction opcodes.
enum Opcode {
#define I(ENUM, NAME, BASEOPCODE, FLAGS, TSFLAGS, IMPDEFS, IMPUSES) ENUM,
#include "X86InstrInfo.def"
};
}
#endif #endif