forked from OSchip/llvm-project
Remove extraneous close parenthesis.
Fix build breakage. llvm-svn: 121596
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@ -232,7 +232,7 @@ unsigned RAGreedy::selectOrSplit(LiveInterval &VirtReg,
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// Check for an available register in this class.
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DEBUG({
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const TargetRegisterClass *TRC = MRI->getRegClass(VirtReg.reg);
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dbgs() << "RegClass: " << TRC->getName() << ' ');
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dbgs() << "RegClass: " << TRC->getName() << ' ';
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});
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AllocationOrder Order(VirtReg.reg, *VRM, ReservedRegs);
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