forked from OSchip/llvm-project
[AArch64][RISCV][x86] add tests for funnel shift with shift logic; NFC
This commit is contained in:
Sanjay Patel
parent
14f143c908
commit
bb850d422b
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@ -343,3 +343,164 @@ define <4 x i32> @fshr_v4i32_shift_by_bitwidth(<4 x i32> %x, <4 x i32> %y) {
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ret <4 x i32> %f
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}
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define i32 @or_shl_fshl(i32 %x, i32 %y, i32 %s) {
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; CHECK-LABEL: or_shl_fshl:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, w2
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; CHECK-NEXT: mvn w9, w2
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; CHECK-NEXT: lsr w10, w1, #1
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; CHECK-NEXT: lsr w9, w10, w9
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; CHECK-NEXT: lsl w8, w0, w8
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; CHECK-NEXT: lsl w10, w1, w2
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: orr w0, w8, w10
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; CHECK-NEXT: ret
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%shy = shl i32 %y, %s
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%fun = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 %s)
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%or = or i32 %fun, %shy
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ret i32 %or
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}
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define i32 @or_shl_rotl(i32 %x, i32 %y, i32 %s) {
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; CHECK-LABEL: or_shl_rotl:
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; CHECK: // %bb.0:
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; CHECK-NEXT: neg w8, w2
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; CHECK-NEXT: lsl w9, w0, w2
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; CHECK-NEXT: ror w8, w1, w8
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; CHECK-NEXT: orr w0, w8, w9
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; CHECK-NEXT: ret
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%shx = shl i32 %x, %s
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%rot = call i32 @llvm.fshl.i32(i32 %y, i32 %y, i32 %s)
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%or = or i32 %rot, %shx
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ret i32 %or
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}
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define i32 @or_shl_fshl_commute(i32 %x, i32 %y, i32 %s) {
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; CHECK-LABEL: or_shl_fshl_commute:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, w2
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; CHECK-NEXT: mvn w9, w2
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; CHECK-NEXT: lsr w10, w1, #1
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; CHECK-NEXT: lsr w9, w10, w9
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; CHECK-NEXT: lsl w8, w0, w8
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; CHECK-NEXT: lsl w10, w1, w2
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: orr w0, w10, w8
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; CHECK-NEXT: ret
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%shy = shl i32 %y, %s
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%fun = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 %s)
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%or = or i32 %shy, %fun
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ret i32 %or
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}
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define i32 @or_shl_rotl_commute(i32 %x, i32 %y, i32 %s) {
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; CHECK-LABEL: or_shl_rotl_commute:
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; CHECK: // %bb.0:
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; CHECK-NEXT: neg w8, w2
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; CHECK-NEXT: lsl w9, w0, w2
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; CHECK-NEXT: ror w8, w1, w8
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; CHECK-NEXT: orr w0, w9, w8
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; CHECK-NEXT: ret
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%shx = shl i32 %x, %s
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%rot = call i32 @llvm.fshl.i32(i32 %y, i32 %y, i32 %s)
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%or = or i32 %shx, %rot
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ret i32 %or
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}
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define i32 @or_lshr_fshr(i32 %x, i32 %y, i32 %s) {
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; CHECK-LABEL: or_lshr_fshr:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, w2
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; CHECK-NEXT: mvn w9, w2
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; CHECK-NEXT: lsl w10, w1, #1
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; CHECK-NEXT: lsr w8, w0, w8
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; CHECK-NEXT: lsl w9, w10, w9
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; CHECK-NEXT: lsr w10, w1, w2
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; CHECK-NEXT: orr w8, w9, w8
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; CHECK-NEXT: orr w0, w8, w10
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; CHECK-NEXT: ret
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%shy = lshr i32 %y, %s
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%fun = call i32 @llvm.fshr.i32(i32 %y, i32 %x, i32 %s)
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%or = or i32 %fun, %shy
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ret i32 %or
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}
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define i32 @or_lshr_rotr(i32 %x, i32 %y, i32 %s) {
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; CHECK-LABEL: or_lshr_rotr:
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; CHECK: // %bb.0:
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; CHECK-NEXT: lsr w8, w0, w2
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; CHECK-NEXT: ror w9, w1, w2
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; CHECK-NEXT: orr w0, w9, w8
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; CHECK-NEXT: ret
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%shx = lshr i32 %x, %s
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%rot = call i32 @llvm.fshr.i32(i32 %y, i32 %y, i32 %s)
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%or = or i32 %rot, %shx
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ret i32 %or
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}
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define i32 @or_lshr_fshr_commute(i32 %x, i32 %y, i32 %s) {
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; CHECK-LABEL: or_lshr_fshr_commute:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, w2
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; CHECK-NEXT: mvn w9, w2
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; CHECK-NEXT: lsl w10, w1, #1
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; CHECK-NEXT: lsr w8, w0, w8
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; CHECK-NEXT: lsl w9, w10, w9
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; CHECK-NEXT: lsr w10, w1, w2
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; CHECK-NEXT: orr w8, w9, w8
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; CHECK-NEXT: orr w0, w10, w8
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; CHECK-NEXT: ret
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%shy = lshr i32 %y, %s
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%fun = call i32 @llvm.fshr.i32(i32 %y, i32 %x, i32 %s)
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%or = or i32 %shy, %fun
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ret i32 %or
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}
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define i32 @or_lshr_rotr_commute(i32 %x, i32 %y, i32 %s) {
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; CHECK-LABEL: or_lshr_rotr_commute:
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; CHECK: // %bb.0:
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; CHECK-NEXT: lsr w8, w0, w2
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; CHECK-NEXT: ror w9, w1, w2
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; CHECK-NEXT: orr w0, w8, w9
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; CHECK-NEXT: ret
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%shx = lshr i32 %x, %s
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%rot = call i32 @llvm.fshr.i32(i32 %y, i32 %y, i32 %s)
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%or = or i32 %shx, %rot
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ret i32 %or
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}
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define i32 @or_shl_fshl_simplify(i32 %x, i32 %y, i32 %s) {
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; CHECK-LABEL: or_shl_fshl_simplify:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, w2
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; CHECK-NEXT: mvn w9, w2
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; CHECK-NEXT: lsr w10, w0, #1
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; CHECK-NEXT: lsr w9, w10, w9
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; CHECK-NEXT: lsl w8, w1, w8
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; CHECK-NEXT: lsl w10, w1, w2
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: orr w0, w8, w10
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; CHECK-NEXT: ret
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%shy = shl i32 %y, %s
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%fun = call i32 @llvm.fshl.i32(i32 %y, i32 %x, i32 %s)
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%or = or i32 %fun, %shy
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ret i32 %or
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}
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define i32 @or_lshr_fshr_simplify(i32 %x, i32 %y, i32 %s) {
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; CHECK-LABEL: or_lshr_fshr_simplify:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, w2
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; CHECK-NEXT: mvn w9, w2
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; CHECK-NEXT: lsl w10, w0, #1
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; CHECK-NEXT: lsr w8, w1, w8
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; CHECK-NEXT: lsl w9, w10, w9
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; CHECK-NEXT: lsr w10, w1, w2
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; CHECK-NEXT: orr w8, w9, w8
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; CHECK-NEXT: orr w0, w10, w8
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; CHECK-NEXT: ret
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%shy = lshr i32 %y, %s
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%fun = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %s)
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%or = or i32 %shy, %fun
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ret i32 %or
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}
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@ -2823,3 +2823,259 @@ define i64 @zexth_i64(i64 %a) nounwind {
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%and = and i64 %a, 65535
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ret i64 %and
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}
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define i32 @or_shl_fshl(i32 %x, i32 %y, i32 %s) {
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; RV32I-LABEL: or_shl_fshl:
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; RV32I: # %bb.0:
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; RV32I-NEXT: sll a3, a1, a2
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; RV32I-NEXT: sll a0, a0, a2
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; RV32I-NEXT: not a2, a2
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; RV32I-NEXT: srli a1, a1, 1
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; RV32I-NEXT: srl a1, a1, a2
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; RV32I-NEXT: or a0, a0, a1
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; RV32I-NEXT: or a0, a0, a3
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; RV32I-NEXT: ret
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;
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; RV32ZBP-LABEL: or_shl_fshl:
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; RV32ZBP: # %bb.0:
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; RV32ZBP-NEXT: sll a3, a1, a2
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; RV32ZBP-NEXT: sll a0, a0, a2
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; RV32ZBP-NEXT: not a2, a2
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; RV32ZBP-NEXT: srli a1, a1, 1
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; RV32ZBP-NEXT: srl a1, a1, a2
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; RV32ZBP-NEXT: or a0, a0, a1
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; RV32ZBP-NEXT: or a0, a0, a3
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; RV32ZBP-NEXT: ret
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%shy = shl i32 %y, %s
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%fun = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 %s)
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%or = or i32 %fun, %shy
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ret i32 %or
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}
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define i32 @or_shl_rot(i32 %x, i32 %y, i32 %s) {
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; RV32I-LABEL: or_shl_rot:
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; RV32I: # %bb.0:
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; RV32I-NEXT: sll a0, a0, a2
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; RV32I-NEXT: sll a3, a1, a2
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; RV32I-NEXT: neg a2, a2
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; RV32I-NEXT: srl a1, a1, a2
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; RV32I-NEXT: or a1, a3, a1
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; RV32I-NEXT: or a0, a1, a0
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; RV32I-NEXT: ret
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;
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; RV32ZBP-LABEL: or_shl_rot:
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; RV32ZBP: # %bb.0:
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; RV32ZBP-NEXT: sll a0, a0, a2
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; RV32ZBP-NEXT: rol a1, a1, a2
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; RV32ZBP-NEXT: or a0, a1, a0
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; RV32ZBP-NEXT: ret
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%shx = shl i32 %x, %s
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%rot = call i32 @llvm.fshl.i32(i32 %y, i32 %y, i32 %s)
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%or = or i32 %rot, %shx
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ret i32 %or
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}
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define i32 @or_shl_fshl_commute(i32 %x, i32 %y, i32 %s) {
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; RV32I-LABEL: or_shl_fshl_commute:
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; RV32I: # %bb.0:
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; RV32I-NEXT: sll a3, a1, a2
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; RV32I-NEXT: sll a0, a0, a2
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; RV32I-NEXT: not a2, a2
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; RV32I-NEXT: srli a1, a1, 1
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; RV32I-NEXT: srl a1, a1, a2
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; RV32I-NEXT: or a0, a0, a1
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; RV32I-NEXT: or a0, a3, a0
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; RV32I-NEXT: ret
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;
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; RV32ZBP-LABEL: or_shl_fshl_commute:
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; RV32ZBP: # %bb.0:
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; RV32ZBP-NEXT: sll a3, a1, a2
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; RV32ZBP-NEXT: sll a0, a0, a2
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; RV32ZBP-NEXT: not a2, a2
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; RV32ZBP-NEXT: srli a1, a1, 1
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; RV32ZBP-NEXT: srl a1, a1, a2
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; RV32ZBP-NEXT: or a0, a0, a1
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; RV32ZBP-NEXT: or a0, a3, a0
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; RV32ZBP-NEXT: ret
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%shy = shl i32 %y, %s
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%fun = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 %s)
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%or = or i32 %shy, %fun
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ret i32 %or
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}
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define i32 @or_shl_rot_commute(i32 %x, i32 %y, i32 %s) {
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; RV32I-LABEL: or_shl_rot_commute:
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; RV32I: # %bb.0:
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; RV32I-NEXT: sll a0, a0, a2
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; RV32I-NEXT: sll a3, a1, a2
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; RV32I-NEXT: neg a2, a2
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; RV32I-NEXT: srl a1, a1, a2
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; RV32I-NEXT: or a1, a3, a1
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; RV32I-NEXT: or a0, a0, a1
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; RV32I-NEXT: ret
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;
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; RV32ZBP-LABEL: or_shl_rot_commute:
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; RV32ZBP: # %bb.0:
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; RV32ZBP-NEXT: sll a0, a0, a2
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; RV32ZBP-NEXT: rol a1, a1, a2
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; RV32ZBP-NEXT: or a0, a0, a1
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; RV32ZBP-NEXT: ret
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%shx = shl i32 %x, %s
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%rot = call i32 @llvm.fshl.i32(i32 %y, i32 %y, i32 %s)
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%or = or i32 %shx, %rot
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ret i32 %or
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}
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define i32 @or_lshr_fshr(i32 %x, i32 %y, i32 %s) {
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; RV32I-LABEL: or_lshr_fshr:
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; RV32I: # %bb.0:
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; RV32I-NEXT: srl a3, a1, a2
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; RV32I-NEXT: srl a0, a0, a2
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; RV32I-NEXT: not a2, a2
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; RV32I-NEXT: slli a1, a1, 1
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; RV32I-NEXT: sll a1, a1, a2
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; RV32I-NEXT: or a0, a1, a0
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; RV32I-NEXT: or a0, a0, a3
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; RV32I-NEXT: ret
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;
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; RV32ZBP-LABEL: or_lshr_fshr:
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; RV32ZBP: # %bb.0:
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; RV32ZBP-NEXT: srl a3, a1, a2
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; RV32ZBP-NEXT: srl a0, a0, a2
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; RV32ZBP-NEXT: not a2, a2
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; RV32ZBP-NEXT: slli a1, a1, 1
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; RV32ZBP-NEXT: sll a1, a1, a2
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; RV32ZBP-NEXT: or a0, a1, a0
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; RV32ZBP-NEXT: or a0, a0, a3
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; RV32ZBP-NEXT: ret
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%shy = lshr i32 %y, %s
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%fun = call i32 @llvm.fshr.i32(i32 %y, i32 %x, i32 %s)
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%or = or i32 %fun, %shy
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ret i32 %or
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}
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define i32 @or_lshr_rotr(i32 %x, i32 %y, i32 %s) {
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; RV32I-LABEL: or_lshr_rotr:
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; RV32I: # %bb.0:
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; RV32I-NEXT: srl a0, a0, a2
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; RV32I-NEXT: srl a3, a1, a2
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; RV32I-NEXT: neg a2, a2
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; RV32I-NEXT: sll a1, a1, a2
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; RV32I-NEXT: or a1, a3, a1
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; RV32I-NEXT: or a0, a1, a0
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; RV32I-NEXT: ret
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;
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; RV32ZBP-LABEL: or_lshr_rotr:
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; RV32ZBP: # %bb.0:
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; RV32ZBP-NEXT: srl a0, a0, a2
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; RV32ZBP-NEXT: ror a1, a1, a2
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; RV32ZBP-NEXT: or a0, a1, a0
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; RV32ZBP-NEXT: ret
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%shx = lshr i32 %x, %s
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%rot = call i32 @llvm.fshr.i32(i32 %y, i32 %y, i32 %s)
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%or = or i32 %rot, %shx
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ret i32 %or
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}
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define i32 @or_lshr_fshr_commute(i32 %x, i32 %y, i32 %s) {
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; RV32I-LABEL: or_lshr_fshr_commute:
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; RV32I: # %bb.0:
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; RV32I-NEXT: srl a3, a1, a2
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; RV32I-NEXT: srl a0, a0, a2
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; RV32I-NEXT: not a2, a2
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; RV32I-NEXT: slli a1, a1, 1
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; RV32I-NEXT: sll a1, a1, a2
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; RV32I-NEXT: or a0, a1, a0
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; RV32I-NEXT: or a0, a3, a0
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; RV32I-NEXT: ret
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;
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; RV32ZBP-LABEL: or_lshr_fshr_commute:
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; RV32ZBP: # %bb.0:
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; RV32ZBP-NEXT: srl a3, a1, a2
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; RV32ZBP-NEXT: srl a0, a0, a2
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; RV32ZBP-NEXT: not a2, a2
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; RV32ZBP-NEXT: slli a1, a1, 1
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; RV32ZBP-NEXT: sll a1, a1, a2
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; RV32ZBP-NEXT: or a0, a1, a0
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; RV32ZBP-NEXT: or a0, a3, a0
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; RV32ZBP-NEXT: ret
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%shy = lshr i32 %y, %s
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%fun = call i32 @llvm.fshr.i32(i32 %y, i32 %x, i32 %s)
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%or = or i32 %shy, %fun
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ret i32 %or
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}
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define i32 @or_lshr_rotr_commute(i32 %x, i32 %y, i32 %s) {
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; RV32I-LABEL: or_lshr_rotr_commute:
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; RV32I: # %bb.0:
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; RV32I-NEXT: srl a0, a0, a2
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; RV32I-NEXT: srl a3, a1, a2
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; RV32I-NEXT: neg a2, a2
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; RV32I-NEXT: sll a1, a1, a2
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; RV32I-NEXT: or a1, a3, a1
|
||||
; RV32I-NEXT: or a0, a0, a1
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32ZBP-LABEL: or_lshr_rotr_commute:
|
||||
; RV32ZBP: # %bb.0:
|
||||
; RV32ZBP-NEXT: srl a0, a0, a2
|
||||
; RV32ZBP-NEXT: ror a1, a1, a2
|
||||
; RV32ZBP-NEXT: or a0, a0, a1
|
||||
; RV32ZBP-NEXT: ret
|
||||
%shx = lshr i32 %x, %s
|
||||
%rot = call i32 @llvm.fshr.i32(i32 %y, i32 %y, i32 %s)
|
||||
%or = or i32 %shx, %rot
|
||||
ret i32 %or
|
||||
}
|
||||
|
||||
define i32 @or_shl_fshl_simplify(i32 %x, i32 %y, i32 %s) {
|
||||
; RV32I-LABEL: or_shl_fshl_simplify:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: sll a1, a1, a2
|
||||
; RV32I-NEXT: not a2, a2
|
||||
; RV32I-NEXT: srli a0, a0, 1
|
||||
; RV32I-NEXT: srl a0, a0, a2
|
||||
; RV32I-NEXT: or a0, a1, a0
|
||||
; RV32I-NEXT: or a0, a0, a1
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32ZBP-LABEL: or_shl_fshl_simplify:
|
||||
; RV32ZBP: # %bb.0:
|
||||
; RV32ZBP-NEXT: sll a1, a1, a2
|
||||
; RV32ZBP-NEXT: not a2, a2
|
||||
; RV32ZBP-NEXT: srli a0, a0, 1
|
||||
; RV32ZBP-NEXT: srl a0, a0, a2
|
||||
; RV32ZBP-NEXT: or a0, a1, a0
|
||||
; RV32ZBP-NEXT: or a0, a0, a1
|
||||
; RV32ZBP-NEXT: ret
|
||||
%shy = shl i32 %y, %s
|
||||
%fun = call i32 @llvm.fshl.i32(i32 %y, i32 %x, i32 %s)
|
||||
%or = or i32 %fun, %shy
|
||||
ret i32 %or
|
||||
}
|
||||
|
||||
define i32 @or_lshr_fshr_simplify(i32 %x, i32 %y, i32 %s) {
|
||||
; RV32I-LABEL: or_lshr_fshr_simplify:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: srl a1, a1, a2
|
||||
; RV32I-NEXT: not a2, a2
|
||||
; RV32I-NEXT: slli a0, a0, 1
|
||||
; RV32I-NEXT: sll a0, a0, a2
|
||||
; RV32I-NEXT: or a0, a0, a1
|
||||
; RV32I-NEXT: or a0, a1, a0
|
||||
; RV32I-NEXT: ret
|
||||
;
|
||||
; RV32ZBP-LABEL: or_lshr_fshr_simplify:
|
||||
; RV32ZBP: # %bb.0:
|
||||
; RV32ZBP-NEXT: srl a1, a1, a2
|
||||
; RV32ZBP-NEXT: not a2, a2
|
||||
; RV32ZBP-NEXT: slli a0, a0, 1
|
||||
; RV32ZBP-NEXT: sll a0, a0, a2
|
||||
; RV32ZBP-NEXT: or a0, a0, a1
|
||||
; RV32ZBP-NEXT: or a0, a1, a0
|
||||
; RV32ZBP-NEXT: ret
|
||||
%shy = lshr i32 %y, %s
|
||||
%fun = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %s)
|
||||
%or = or i32 %shy, %fun
|
||||
ret i32 %or
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1036,3 +1036,281 @@ define void @PR45265(i32 %0, %struct.S* nocapture readonly %1) nounwind {
|
|||
ret void
|
||||
}
|
||||
declare dso_local void @_Z3foov()
|
||||
|
||||
define i32 @or_shl_fshl(i32 %x, i32 %y, i32 %s) nounwind {
|
||||
; X86-SSE2-LABEL: or_shl_fshl:
|
||||
; X86-SSE2: # %bb.0:
|
||||
; X86-SSE2-NEXT: pushl %esi
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-SSE2-NEXT: movl %edx, %esi
|
||||
; X86-SSE2-NEXT: shll %cl, %esi
|
||||
; X86-SSE2-NEXT: shldl %cl, %edx, %eax
|
||||
; X86-SSE2-NEXT: orl %esi, %eax
|
||||
; X86-SSE2-NEXT: popl %esi
|
||||
; X86-SSE2-NEXT: retl
|
||||
;
|
||||
; X64-AVX2-LABEL: or_shl_fshl:
|
||||
; X64-AVX2: # %bb.0:
|
||||
; X64-AVX2-NEXT: movl %edx, %ecx
|
||||
; X64-AVX2-NEXT: movl %esi, %eax
|
||||
; X64-AVX2-NEXT: shll %cl, %eax
|
||||
; X64-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-AVX2-NEXT: shldl %cl, %esi, %edi
|
||||
; X64-AVX2-NEXT: orl %edi, %eax
|
||||
; X64-AVX2-NEXT: retq
|
||||
%shy = shl i32 %y, %s
|
||||
%fun = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 %s)
|
||||
%or = or i32 %fun, %shy
|
||||
ret i32 %or
|
||||
}
|
||||
|
||||
define i32 @or_shl_rotl(i32 %x, i32 %y, i32 %s) nounwind {
|
||||
; X86-SSE2-LABEL: or_shl_rotl:
|
||||
; X86-SSE2: # %bb.0:
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-SSE2-NEXT: shll %cl, %edx
|
||||
; X86-SSE2-NEXT: roll %cl, %eax
|
||||
; X86-SSE2-NEXT: orl %edx, %eax
|
||||
; X86-SSE2-NEXT: retl
|
||||
;
|
||||
; X64-AVX2-LABEL: or_shl_rotl:
|
||||
; X64-AVX2: # %bb.0:
|
||||
; X64-AVX2-NEXT: movl %edx, %ecx
|
||||
; X64-AVX2-NEXT: movl %esi, %eax
|
||||
; X64-AVX2-NEXT: shll %cl, %edi
|
||||
; X64-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-AVX2-NEXT: roll %cl, %eax
|
||||
; X64-AVX2-NEXT: orl %edi, %eax
|
||||
; X64-AVX2-NEXT: retq
|
||||
%shx = shl i32 %x, %s
|
||||
%rot = call i32 @llvm.fshl.i32(i32 %y, i32 %y, i32 %s)
|
||||
%or = or i32 %rot, %shx
|
||||
ret i32 %or
|
||||
}
|
||||
|
||||
define i32 @or_shl_fshl_commute(i32 %x, i32 %y, i32 %s) nounwind {
|
||||
; X86-SSE2-LABEL: or_shl_fshl_commute:
|
||||
; X86-SSE2: # %bb.0:
|
||||
; X86-SSE2-NEXT: pushl %esi
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-SSE2-NEXT: movl %edx, %esi
|
||||
; X86-SSE2-NEXT: shll %cl, %esi
|
||||
; X86-SSE2-NEXT: shldl %cl, %edx, %eax
|
||||
; X86-SSE2-NEXT: orl %esi, %eax
|
||||
; X86-SSE2-NEXT: popl %esi
|
||||
; X86-SSE2-NEXT: retl
|
||||
;
|
||||
; X64-AVX2-LABEL: or_shl_fshl_commute:
|
||||
; X64-AVX2: # %bb.0:
|
||||
; X64-AVX2-NEXT: movl %edx, %ecx
|
||||
; X64-AVX2-NEXT: movl %esi, %eax
|
||||
; X64-AVX2-NEXT: shll %cl, %eax
|
||||
; X64-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-AVX2-NEXT: shldl %cl, %esi, %edi
|
||||
; X64-AVX2-NEXT: orl %edi, %eax
|
||||
; X64-AVX2-NEXT: retq
|
||||
%shy = shl i32 %y, %s
|
||||
%fun = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 %s)
|
||||
%or = or i32 %shy, %fun
|
||||
ret i32 %or
|
||||
}
|
||||
|
||||
define i32 @or_shl_rotl_commute(i32 %x, i32 %y, i32 %s) nounwind {
|
||||
; X86-SSE2-LABEL: or_shl_rotl_commute:
|
||||
; X86-SSE2: # %bb.0:
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-SSE2-NEXT: shll %cl, %edx
|
||||
; X86-SSE2-NEXT: roll %cl, %eax
|
||||
; X86-SSE2-NEXT: orl %edx, %eax
|
||||
; X86-SSE2-NEXT: retl
|
||||
;
|
||||
; X64-AVX2-LABEL: or_shl_rotl_commute:
|
||||
; X64-AVX2: # %bb.0:
|
||||
; X64-AVX2-NEXT: movl %edx, %ecx
|
||||
; X64-AVX2-NEXT: movl %esi, %eax
|
||||
; X64-AVX2-NEXT: shll %cl, %edi
|
||||
; X64-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-AVX2-NEXT: roll %cl, %eax
|
||||
; X64-AVX2-NEXT: orl %edi, %eax
|
||||
; X64-AVX2-NEXT: retq
|
||||
%shx = shl i32 %x, %s
|
||||
%rot = call i32 @llvm.fshl.i32(i32 %y, i32 %y, i32 %s)
|
||||
%or = or i32 %shx, %rot
|
||||
ret i32 %or
|
||||
}
|
||||
|
||||
define i32 @or_lshr_fshr(i32 %x, i32 %y, i32 %s) nounwind {
|
||||
; X86-SSE2-LABEL: or_lshr_fshr:
|
||||
; X86-SSE2: # %bb.0:
|
||||
; X86-SSE2-NEXT: pushl %esi
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-SSE2-NEXT: movl %edx, %esi
|
||||
; X86-SSE2-NEXT: shrl %cl, %esi
|
||||
; X86-SSE2-NEXT: shrdl %cl, %edx, %eax
|
||||
; X86-SSE2-NEXT: orl %esi, %eax
|
||||
; X86-SSE2-NEXT: popl %esi
|
||||
; X86-SSE2-NEXT: retl
|
||||
;
|
||||
; X64-AVX2-LABEL: or_lshr_fshr:
|
||||
; X64-AVX2: # %bb.0:
|
||||
; X64-AVX2-NEXT: movl %edx, %ecx
|
||||
; X64-AVX2-NEXT: movl %esi, %eax
|
||||
; X64-AVX2-NEXT: shrl %cl, %eax
|
||||
; X64-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-AVX2-NEXT: shrdl %cl, %esi, %edi
|
||||
; X64-AVX2-NEXT: orl %edi, %eax
|
||||
; X64-AVX2-NEXT: retq
|
||||
%shy = lshr i32 %y, %s
|
||||
%fun = call i32 @llvm.fshr.i32(i32 %y, i32 %x, i32 %s)
|
||||
%or = or i32 %fun, %shy
|
||||
ret i32 %or
|
||||
}
|
||||
|
||||
define i32 @or_lshr_rotr(i32 %x, i32 %y, i32 %s) nounwind {
|
||||
; X86-SSE2-LABEL: or_lshr_rotr:
|
||||
; X86-SSE2: # %bb.0:
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-SSE2-NEXT: shrl %cl, %edx
|
||||
; X86-SSE2-NEXT: rorl %cl, %eax
|
||||
; X86-SSE2-NEXT: orl %edx, %eax
|
||||
; X86-SSE2-NEXT: retl
|
||||
;
|
||||
; X64-AVX2-LABEL: or_lshr_rotr:
|
||||
; X64-AVX2: # %bb.0:
|
||||
; X64-AVX2-NEXT: movl %edx, %ecx
|
||||
; X64-AVX2-NEXT: movl %esi, %eax
|
||||
; X64-AVX2-NEXT: shrl %cl, %edi
|
||||
; X64-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-AVX2-NEXT: rorl %cl, %eax
|
||||
; X64-AVX2-NEXT: orl %edi, %eax
|
||||
; X64-AVX2-NEXT: retq
|
||||
%shx = lshr i32 %x, %s
|
||||
%rot = call i32 @llvm.fshr.i32(i32 %y, i32 %y, i32 %s)
|
||||
%or = or i32 %rot, %shx
|
||||
ret i32 %or
|
||||
}
|
||||
|
||||
define i32 @or_lshr_fshr_commute(i32 %x, i32 %y, i32 %s) nounwind {
|
||||
; X86-SSE2-LABEL: or_lshr_fshr_commute:
|
||||
; X86-SSE2: # %bb.0:
|
||||
; X86-SSE2-NEXT: pushl %esi
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-SSE2-NEXT: movl %edx, %esi
|
||||
; X86-SSE2-NEXT: shrl %cl, %esi
|
||||
; X86-SSE2-NEXT: shrdl %cl, %edx, %eax
|
||||
; X86-SSE2-NEXT: orl %esi, %eax
|
||||
; X86-SSE2-NEXT: popl %esi
|
||||
; X86-SSE2-NEXT: retl
|
||||
;
|
||||
; X64-AVX2-LABEL: or_lshr_fshr_commute:
|
||||
; X64-AVX2: # %bb.0:
|
||||
; X64-AVX2-NEXT: movl %edx, %ecx
|
||||
; X64-AVX2-NEXT: movl %esi, %eax
|
||||
; X64-AVX2-NEXT: shrl %cl, %eax
|
||||
; X64-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-AVX2-NEXT: shrdl %cl, %esi, %edi
|
||||
; X64-AVX2-NEXT: orl %edi, %eax
|
||||
; X64-AVX2-NEXT: retq
|
||||
%shy = lshr i32 %y, %s
|
||||
%fun = call i32 @llvm.fshr.i32(i32 %y, i32 %x, i32 %s)
|
||||
%or = or i32 %shy, %fun
|
||||
ret i32 %or
|
||||
}
|
||||
|
||||
define i32 @or_lshr_rotr_commute(i32 %x, i32 %y, i32 %s) nounwind {
|
||||
; X86-SSE2-LABEL: or_lshr_rotr_commute:
|
||||
; X86-SSE2: # %bb.0:
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-SSE2-NEXT: shrl %cl, %edx
|
||||
; X86-SSE2-NEXT: rorl %cl, %eax
|
||||
; X86-SSE2-NEXT: orl %edx, %eax
|
||||
; X86-SSE2-NEXT: retl
|
||||
;
|
||||
; X64-AVX2-LABEL: or_lshr_rotr_commute:
|
||||
; X64-AVX2: # %bb.0:
|
||||
; X64-AVX2-NEXT: movl %edx, %ecx
|
||||
; X64-AVX2-NEXT: movl %esi, %eax
|
||||
; X64-AVX2-NEXT: shrl %cl, %edi
|
||||
; X64-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-AVX2-NEXT: rorl %cl, %eax
|
||||
; X64-AVX2-NEXT: orl %edi, %eax
|
||||
; X64-AVX2-NEXT: retq
|
||||
%shx = lshr i32 %x, %s
|
||||
%rot = call i32 @llvm.fshr.i32(i32 %y, i32 %y, i32 %s)
|
||||
%or = or i32 %shx, %rot
|
||||
ret i32 %or
|
||||
}
|
||||
|
||||
define i32 @or_shl_fshl_simplify(i32 %x, i32 %y, i32 %s) nounwind {
|
||||
; X86-SSE2-LABEL: or_shl_fshl_simplify:
|
||||
; X86-SSE2: # %bb.0:
|
||||
; X86-SSE2-NEXT: pushl %esi
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-SSE2-NEXT: movl %eax, %esi
|
||||
; X86-SSE2-NEXT: shll %cl, %esi
|
||||
; X86-SSE2-NEXT: shldl %cl, %edx, %eax
|
||||
; X86-SSE2-NEXT: orl %esi, %eax
|
||||
; X86-SSE2-NEXT: popl %esi
|
||||
; X86-SSE2-NEXT: retl
|
||||
;
|
||||
; X64-AVX2-LABEL: or_shl_fshl_simplify:
|
||||
; X64-AVX2: # %bb.0:
|
||||
; X64-AVX2-NEXT: movl %edx, %ecx
|
||||
; X64-AVX2-NEXT: movl %esi, %eax
|
||||
; X64-AVX2-NEXT: shll %cl, %eax
|
||||
; X64-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-AVX2-NEXT: shldl %cl, %edi, %esi
|
||||
; X64-AVX2-NEXT: orl %esi, %eax
|
||||
; X64-AVX2-NEXT: retq
|
||||
%shy = shl i32 %y, %s
|
||||
%fun = call i32 @llvm.fshl.i32(i32 %y, i32 %x, i32 %s)
|
||||
%or = or i32 %fun, %shy
|
||||
ret i32 %or
|
||||
}
|
||||
|
||||
define i32 @or_lshr_fshr_simplify(i32 %x, i32 %y, i32 %s) nounwind {
|
||||
; X86-SSE2-LABEL: or_lshr_fshr_simplify:
|
||||
; X86-SSE2: # %bb.0:
|
||||
; X86-SSE2-NEXT: pushl %esi
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-SSE2-NEXT: movl %eax, %esi
|
||||
; X86-SSE2-NEXT: shrl %cl, %esi
|
||||
; X86-SSE2-NEXT: shrdl %cl, %edx, %eax
|
||||
; X86-SSE2-NEXT: orl %esi, %eax
|
||||
; X86-SSE2-NEXT: popl %esi
|
||||
; X86-SSE2-NEXT: retl
|
||||
;
|
||||
; X64-AVX2-LABEL: or_lshr_fshr_simplify:
|
||||
; X64-AVX2: # %bb.0:
|
||||
; X64-AVX2-NEXT: movl %edx, %ecx
|
||||
; X64-AVX2-NEXT: movl %esi, %eax
|
||||
; X64-AVX2-NEXT: shrl %cl, %eax
|
||||
; X64-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-AVX2-NEXT: shrdl %cl, %edi, %esi
|
||||
; X64-AVX2-NEXT: orl %esi, %eax
|
||||
; X64-AVX2-NEXT: retq
|
||||
%shy = lshr i32 %y, %s
|
||||
%fun = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %s)
|
||||
%or = or i32 %shy, %fun
|
||||
ret i32 %or
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue