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Mark all these as needing SSE2. Should fix PPC and 

maybe even Linux.

llvm-svn: 115291
This commit is contained in:
Dale Johannesen 2010-10-01 04:17:55 +00:00
parent 878eaf188c
commit bb6b961867
7 changed files with 10 additions and 10 deletions
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2
llvm/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -mattr=+mmx | not grep movl ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | not grep movl
define <8 x i8> @a(i8 zeroext %x) nounwind { define <8 x i8> @a(i8 zeroext %x) nounwind {
%r = insertelement <8 x i8> undef, i8 %x, i32 0 %r = insertelement <8 x i8> undef, i8 %x, i32 0

2
llvm/test/CodeGen/X86/fast-isel-bc.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -O0 -regalloc=linearscan -march=x86-64 -mattr=+mmx | FileCheck %s ; RUN: llc < %s -O0 -regalloc=linearscan -march=x86-64 -mattr=+mmx,+sse2 | FileCheck %s
; PR4684 ; PR4684
target datalayout = target datalayout =

4
llvm/test/CodeGen/X86/mmx-insert-element.ll
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@ -1,5 +1,5 @@
; RUN: llc < %s -march=x86 -mattr=+mmx,+sse | grep movq ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep movq
; RUN: llc < %s -march=x86 -mattr=+mmx,+sse | grep pshufd ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep pshufd
; This is not an MMX operation; promoted to XMM. ; This is not an MMX operation; promoted to XMM.
define x86_mmx @qux(i32 %A) nounwind { define x86_mmx @qux(i32 %A) nounwind {

4
llvm/test/CodeGen/X86/mmx-punpckhdq.ll
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@ -1,5 +1,5 @@
; RRUN: llc < %s -march=x86 -mattr=+mmx | grep pextrd ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep pextrd
; RRUN: llc < %s -march=x86 -mattr=+mmx | grep punpckhdq | count 1 ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep punpckhdq | count 1
; There are no MMX operations in bork; promoted to XMM. ; There are no MMX operations in bork; promoted to XMM.
define void @bork(<1 x i64>* %x) { define void @bork(<1 x i64>* %x) {

4
llvm/test/CodeGen/X86/mmx-vzmovl-2.ll
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@ -1,5 +1,5 @@
; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep pxor ; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | grep pxor
; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep punpckldq ; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | grep punpckldq
%struct.vS1024 = type { [8 x <4 x i32>] } %struct.vS1024 = type { [8 x <4 x i32>] }
%struct.vS512 = type { [4 x <4 x i32>] } %struct.vS512 = type { [4 x <4 x i32>] }

2
llvm/test/CodeGen/X86/mmx-vzmovl.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep movq | count 2 ; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | grep movq | count 2
; There are no MMX operations here; this is promoted to XMM. ; There are no MMX operations here; this is promoted to XMM.
define void @foo(<1 x i64>* %a, <1 x i64>* %b) nounwind { define void @foo(<1 x i64>* %a, <1 x i64>* %b) nounwind {

2
llvm/test/CodeGen/X86/vec_insert-7.ll
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@ -1,4 +1,4 @@
; RRUN: llc < %s -march=x86 -mattr=+mmx,+sse -mtriple=i686-apple-darwin9 -o - | grep pinsrd | count 2 ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 -mtriple=i686-apple-darwin9 -o - | grep pinsrd | count 2
; MMX insertelement is not available; these are promoted to XMM. ; MMX insertelement is not available; these are promoted to XMM.
; (Without SSE they are split to two ints, and the code is much better.) ; (Without SSE they are split to two ints, and the code is much better.)