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[InstCombine][X86] MULDQ/MULUDQ undef -> zero 

Match generic mul behaviour so that <X x i64> multiply and muldq/muludq pattern act the same

llvm-svn: 292784
This commit is contained in:
Simon Pilgrim 2017-01-23 12:07:32 +00:00
parent 61d8e0003c
commit bb13fdabec
2 changed files with 8 additions and 8 deletions
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4
llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
View File

@ -515,9 +515,9 @@ static Value *simplifyX86muldq(const IntrinsicInst &II) {
Value *Arg1 = II.getArgOperand(1);
Type *ResTy = II.getType();
// muldq/muludq(undef, undef) -> undef
// muldq/muludq(undef, undef) -> zero (matches generic mul behavior)
if (isa<UndefValue>(Arg0) && isa<UndefValue>(Arg1))
return UndefValue::get(ResTy);
return ConstantAggregateZero::get(ResTy);
return nullptr;
}

12
llvm/test/Transforms/InstCombine/x86-muldq.ll
View File

@ -7,7 +7,7 @@
define <2 x i64> @undef_pmuludq_128(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: @undef_pmuludq_128(
; CHECK-NEXT: ret <2 x i64> undef
; CHECK-NEXT: ret <2 x i64> zeroinitializer
;
%1 = call <2 x i64> @llvm.x86.sse2.pmulu.dq(<4 x i32> undef, <4 x i32> undef)
ret <2 x i64> %1
@ -15,7 +15,7 @@ define <2 x i64> @undef_pmuludq_128(<4 x i32> %a0, <4 x i32> %a1) {
define <4 x i64> @undef_pmuludq_256(<8 x i32> %a0, <8 x i32> %a1) {
; CHECK-LABEL: @undef_pmuludq_256(
; CHECK-NEXT: ret <4 x i64> undef
; CHECK-NEXT: ret <4 x i64> zeroinitializer
;
%1 = call <4 x i64> @llvm.x86.avx2.pmulu.dq(<8 x i32> undef, <8 x i32> undef)
ret <4 x i64> %1
@ -23,7 +23,7 @@ define <4 x i64> @undef_pmuludq_256(<8 x i32> %a0, <8 x i32> %a1) {
define <8 x i64> @undef_pmuludq_512(<16 x i32> %a0, <16 x i32> %a1) {
; CHECK-LABEL: @undef_pmuludq_512(
; CHECK-NEXT: ret <8 x i64> undef
; CHECK-NEXT: ret <8 x i64> zeroinitializer
;
%1 = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> undef, <16 x i32> undef)
ret <8 x i64> %1
@ -31,7 +31,7 @@ define <8 x i64> @undef_pmuludq_512(<16 x i32> %a0, <16 x i32> %a1) {
define <2 x i64> @undef_pmuldq_128(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: @undef_pmuldq_128(
; CHECK-NEXT: ret <2 x i64> undef
; CHECK-NEXT: ret <2 x i64> zeroinitializer
;
%1 = call <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32> undef, <4 x i32> undef)
ret <2 x i64> %1
@ -39,7 +39,7 @@ define <2 x i64> @undef_pmuldq_128(<4 x i32> %a0, <4 x i32> %a1) {
define <4 x i64> @undef_pmuldq_256(<8 x i32> %a0, <8 x i32> %a1) {
; CHECK-LABEL: @undef_pmuldq_256(
; CHECK-NEXT: ret <4 x i64> undef
; CHECK-NEXT: ret <4 x i64> zeroinitializer
;
%1 = call <4 x i64> @llvm.x86.avx2.pmul.dq(<8 x i32> undef, <8 x i32> undef)
ret <4 x i64> %1
@ -47,7 +47,7 @@ define <4 x i64> @undef_pmuldq_256(<8 x i32> %a0, <8 x i32> %a1) {
define <8 x i64> @undef_pmuldq_512(<16 x i32> %a0, <16 x i32> %a1) {
; CHECK-LABEL: @undef_pmuldq_512(
; CHECK-NEXT: ret <8 x i64> undef
; CHECK-NEXT: ret <8 x i64> zeroinitializer
;
%1 = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> undef, <16 x i32> undef)
ret <8 x i64> %1