forked from OSchip/llvm-project
[AVX-512] Move the combine that runs combineBitcastForMaskedOp to the last DAG combine phase where I had originally meant to put it.
llvm-svn: 293157
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@ -29505,7 +29505,7 @@ static SDValue combineSelect(SDNode *N, SelectionDAG &DAG,
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// Look for vselects with LHS/RHS being bitcasted from an operation that
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// can be executed on another type. Push the bitcast to the inputs of
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// the operation. This exposes opportunities for using masking instructions.
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if (N->getOpcode() == ISD::VSELECT && !DCI.isBeforeLegalizeOps() &&
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if (N->getOpcode() == ISD::VSELECT && DCI.isAfterLegalizeVectorOps() &&
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CondVT.getVectorElementType() == MVT::i1) {
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if (combineBitcastForMaskedOp(LHS, DAG, DCI))
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return SDValue(N, 0);
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