forked from OSchip/llvm-project
[X86] Dont' allow 'outs' and 'ins' in at&t syntax without suffixes.
The match would be ambiguous, but at&t asm parsing doesn't support ambiguous matches and will just return the first. llvm-svn: 325192
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@ -3172,15 +3172,15 @@ def : InstAlias<"imul{q}\t{$imm, $r|$r, $imm}", (IMUL64rri8 GR64:$r, GR64:$r, i6
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// ins aliases. Accept the mnemonic suffix being omitted because it's implicit
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// in the destination.
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def : InstAlias<"ins\t{%dx, $dst|$dst, dx}", (INSB dstidx8:$dst), 0>;
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def : InstAlias<"ins\t{%dx, $dst|$dst, dx}", (INSW dstidx16:$dst), 0>;
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def : InstAlias<"ins\t{%dx, $dst|$dst, dx}", (INSL dstidx32:$dst), 0>;
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def : InstAlias<"ins{b}\t{%dx, $dst|$dst, dx}", (INSB dstidx8:$dst), 0>;
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def : InstAlias<"ins{w}\t{%dx, $dst|$dst, dx}", (INSW dstidx16:$dst), 0>;
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def : InstAlias<"ins{l}\t{%dx, $dst|$dst, dx}", (INSL dstidx32:$dst), 0>;
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// outs aliases. Accept the mnemonic suffix being omitted because it's implicit
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// in the source.
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def : InstAlias<"outs\t{$src, %dx|dx, $src}", (OUTSB srcidx8:$src), 0>;
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def : InstAlias<"outs\t{$src, %dx|dx, $src}", (OUTSW srcidx16:$src), 0>;
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def : InstAlias<"outs\t{$src, %dx|dx, $src}", (OUTSL srcidx32:$src), 0>;
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def : InstAlias<"outs{b}\t{$src, %dx|dx, $src}", (OUTSB srcidx8:$src), 0>;
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def : InstAlias<"outs{w}\t{$src, %dx|dx, $src}", (OUTSW srcidx16:$src), 0>;
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def : InstAlias<"outs{l}\t{$src, %dx|dx, $src}", (OUTSL srcidx32:$src), 0>;
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// inb %dx -> inb %al, %dx
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def : InstAlias<"inb\t{%dx|dx}", (IN8rr), 0>;
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@ -644,8 +644,6 @@ inl (%dx), %eax
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//PR15455
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outs (%esi), (%dx)
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// CHECK: outsw (%esi), %dx
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outsb (%esi), (%dx)
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// CHECK: outsb (%esi), %dx
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outsw (%esi), (%dx)
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@ -653,8 +651,6 @@ outsw (%esi), (%dx)
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outsl (%esi), (%dx)
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// CHECK: outsl (%esi), %dx
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ins (%dx), %es:(%edi)
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// CHECK: insw %dx, %es:(%edi)
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insb (%dx), %es:(%edi)
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// CHECK: insb %dx, %es:(%edi)
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insw (%dx), %es:(%edi)
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@ -288,9 +288,6 @@ inl (%dx), %eax
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//PR15455
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// permitted invalid memory forms
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outs (%rsi), (%dx)
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// CHECK: outsw (%rsi), %dx
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outsb (%rsi), (%dx)
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// CHECK: outsb (%rsi), %dx
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outsw (%rsi), (%dx)
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@ -298,8 +295,6 @@ outsw (%rsi), (%dx)
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outsl (%rsi), (%dx)
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// CHECK: outsl (%rsi), %dx
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ins (%dx), %es:(%rdi)
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// CHECK: insw %dx, %es:(%rdi)
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insb (%dx), %es:(%rdi)
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// CHECK: insb %dx, %es:(%rdi)
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insw (%dx), %es:(%rdi)
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