[AMDGPU][MC][DISASSEMBLER] Corrected decoder to consume each code fragment only once

Summary: disabled disassembly of successfully decoded fragments of code.

See detailed bug description: https://bugs.llvm.org/show_bug.cgi?id=46101

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D80637
This commit is contained in:
Dmitry Preobrazhensky 2020-05-28 14:15:29 +03:00
parent bd06c417e6
commit bab5dadfcd
2 changed files with 2 additions and 9 deletions

View File

@ -362,13 +362,6 @@ DecodeStatus AMDGPUDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
Res = tryDecodeInst(DecoderTableGFX1064, MI, QW, Address);
} while (false);
if (Res && (MaxInstBytesNum - Bytes.size()) == 12 && (!HasLiteral ||
!(MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::VOP3))) {
MaxInstBytesNum = 8;
Bytes = Bytes_.slice(0, MaxInstBytesNum);
eatBytes<uint64_t>(Bytes);
}
if (Res && (MI.getOpcode() == AMDGPU::V_MAC_F32_e64_vi ||
MI.getOpcode() == AMDGPU::V_MAC_F32_e64_gfx6_gfx7 ||
MI.getOpcode() == AMDGPU::V_MAC_F32_e64_gfx10 ||

View File

@ -98025,8 +98025,8 @@
# GFX10: v_trunc_f64_e64 v[5:6], |v[1:2]| ; encoding: [0x05,0x01,0x97,0xd5,0x01,0x01,0x00,0x00]
0x05,0x01,0x97,0xd5,0x01,0x01,0x00,0x00
# GFX10: v_writelane_b32 v255, 0, s2 ; encoding: [0xff,0x00,0x61,0xd7,0x80,0x04,0x00,0x00]
0xff,0x00,0x61,0xd7,0x80,0x04,0x00,0x00
# GFX10-FIXME: v_writelane_b32 v255, 0, s2 ; encoding: [0xff,0x00,0x61,0xd7,0x80,0x04,0x00,0x00]
# 0xff,0x00,0x61,0xd7,0x80,0x04,0x00,0x00
# GFX10: v_writelane_b32 v5, -1, s2 ; encoding: [0x05,0x00,0x61,0xd7,0xc1,0x04,0x00,0x00]
0x05,0x00,0x61,0xd7,0xc1,0x04,0x00,0x00