forked from OSchip/llvm-project
[SystemZ] Two tests missing from previous commit
llvm-svn: 182847
This commit is contained in:
Richard Sandiford
parent
e1d9f00f09
commit
ba97c34bb6
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# Test 32-bit COMPARE IMMEDIATE AND BRANCH in cases where the sheer number of
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# instructions causes some branches to be out of range.
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# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
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# Construct:
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#
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# before0:
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# conditional branch to after0
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# ...
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# beforeN:
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# conditional branch to after0
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# main:
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# 0xffcc bytes, from MVIY instructions
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# conditional branch to main
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# after0:
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# ...
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# conditional branch to main
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# afterN:
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#
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# Each conditional branch sequence occupies 12 bytes if it uses a short
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# branch and 16 if it uses a long one. The ones before "main:" have to
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# take the branch length into account, which is 6 for short branches,
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# so the final (0x34 - 6) / 12 == 3 blocks can use short branches.
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# The ones after "main:" do not, so the first 0x34 / 12 == 4 blocks
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# can use short branches. The conservative algorithm we use makes
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# one of the forward branches unnecessarily long, as noted in the
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# check output below.
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#
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: chi [[REG]], 50
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# CHECK: jgl [[LABEL:\.L[^ ]*]]
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: chi [[REG]], 51
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# CHECK: jgl [[LABEL]]
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: chi [[REG]], 52
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# CHECK: jgl [[LABEL]]
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: chi [[REG]], 53
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# CHECK: jgl [[LABEL]]
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: chi [[REG]], 54
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# CHECK: jgl [[LABEL]]
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# ...as mentioned above, the next one could be a CIJL instead...
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: chi [[REG]], 55
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# CHECK: jgl [[LABEL]]
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cijl [[REG]], 56, [[LABEL]]
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cijl [[REG]], 57, [[LABEL]]
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# ...main goes here...
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cijl [[REG]], 100, [[LABEL:\.L[^ ]*]]
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cijl [[REG]], 101, [[LABEL]]
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cijl [[REG]], 102, [[LABEL]]
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cijl [[REG]], 103, [[LABEL]]
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: chi [[REG]], 104
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# CHECK: jgl [[LABEL]]
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: chi [[REG]], 105
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# CHECK: jgl [[LABEL]]
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: chi [[REG]], 106
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# CHECK: jgl [[LABEL]]
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# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: chi [[REG]], 107
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# CHECK: jgl [[LABEL]]
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branch_blocks = 8
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main_size = 0xffcc
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print 'define void @f1(i8 *%base, i8 *%stop) {'
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print 'entry:'
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print ' br label %before0'
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print ''
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for i in xrange(branch_blocks):
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next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main'
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print 'before%d:' % i
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print ' %%bcur%d = load volatile i8 *%%stop' % i
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print ' %%bext%d = sext i8 %%bcur%d to i32' % (i, i)
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print ' %%btest%d = icmp slt i32 %%bext%d, %d' % (i, i, i + 50)
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print ' br i1 %%btest%d, label %%after0, label %%%s' % (i, next)
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print ''
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print '%s:' % next
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a, b = 1, 1
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for i in xrange(0, main_size, 6):
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a, b = b, a + b
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offset = 4096 + b % 500000
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value = a % 256
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print ' %%ptr%d = getelementptr i8 *%%base, i64 %d' % (i, offset)
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print ' store volatile i8 %d, i8 *%%ptr%d' % (value, i)
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for i in xrange(branch_blocks):
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print ' %%acur%d = load volatile i8 *%%stop' % i
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print ' %%aext%d = sext i8 %%acur%d to i32' % (i, i)
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print ' %%atest%d = icmp slt i32 %%aext%d, %d' % (i, i, i + 100)
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print ' br i1 %%atest%d, label %%main, label %%after%d' % (i, i)
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print ''
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print 'after%d:' % i
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print ' ret void'
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print '}'
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@ -0,0 +1,109 @@
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# Test 64-bit COMPARE IMMEDIATE AND BRANCH in cases where the sheer number of
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# instructions causes some branches to be out of range.
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# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
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# Construct:
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#
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# before0:
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# conditional branch to after0
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# ...
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# beforeN:
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# conditional branch to after0
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# main:
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# 0xffcc bytes, from MVIY instructions
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# conditional branch to main
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# after0:
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# ...
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# conditional branch to main
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# afterN:
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#
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# Each conditional branch sequence occupies 12 bytes if it uses a short
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# branch and 16 if it uses a long one. The ones before "main:" have to
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# take the branch length into account, which is 6 for short branches,
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# so the final (0x34 - 6) / 12 == 3 blocks can use short branches.
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# The ones after "main:" do not, so the first 0x34 / 12 == 4 blocks
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# can use short branches. The conservative algorithm we use makes
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# one of the forward branches unnecessarily long, as noted in the
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# check output below.
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#
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cghi [[REG]], 50
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# CHECK: jgl [[LABEL:\.L[^ ]*]]
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cghi [[REG]], 51
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# CHECK: jgl [[LABEL]]
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cghi [[REG]], 52
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# CHECK: jgl [[LABEL]]
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cghi [[REG]], 53
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# CHECK: jgl [[LABEL]]
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cghi [[REG]], 54
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# CHECK: jgl [[LABEL]]
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# ...as mentioned above, the next one could be a CGIJL instead...
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cghi [[REG]], 55
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# CHECK: jgl [[LABEL]]
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cgijl [[REG]], 56, [[LABEL]]
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cgijl [[REG]], 57, [[LABEL]]
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# ...main goes here...
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cgijl [[REG]], 100, [[LABEL:\.L[^ ]*]]
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cgijl [[REG]], 101, [[LABEL]]
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cgijl [[REG]], 102, [[LABEL]]
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cgijl [[REG]], 103, [[LABEL]]
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cghi [[REG]], 104
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# CHECK: jgl [[LABEL]]
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cghi [[REG]], 105
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# CHECK: jgl [[LABEL]]
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cghi [[REG]], 106
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# CHECK: jgl [[LABEL]]
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# CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
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# CHECK: cghi [[REG]], 107
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# CHECK: jgl [[LABEL]]
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branch_blocks = 8
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main_size = 0xffcc
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print 'define void @f1(i8 *%base, i8 *%stop) {'
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print 'entry:'
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print ' br label %before0'
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print ''
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for i in xrange(branch_blocks):
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next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main'
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print 'before%d:' % i
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print ' %%bcur%d = load volatile i8 *%%stop' % i
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print ' %%bext%d = sext i8 %%bcur%d to i64' % (i, i)
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print ' %%btest%d = icmp slt i64 %%bext%d, %d' % (i, i, i + 50)
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print ' br i1 %%btest%d, label %%after0, label %%%s' % (i, next)
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print ''
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print '%s:' % next
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a, b = 1, 1
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for i in xrange(0, main_size, 6):
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a, b = b, a + b
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offset = 4096 + b % 500000
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value = a % 256
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print ' %%ptr%d = getelementptr i8 *%%base, i64 %d' % (i, offset)
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print ' store volatile i8 %d, i8 *%%ptr%d' % (value, i)
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for i in xrange(branch_blocks):
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print ' %%acur%d = load volatile i8 *%%stop' % i
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print ' %%aext%d = sext i8 %%acur%d to i64' % (i, i)
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print ' %%atest%d = icmp slt i64 %%aext%d, %d' % (i, i, i + 100)
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print ' br i1 %%atest%d, label %%main, label %%after%d' % (i, i)
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print ''
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print 'after%d:' % i
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print ' ret void'
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print '}'
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