[AArch64] Add test case to show missed opportunity to remove a shift before tbnz when the shift has been zero extended from i32 to i64. NFC

This pattern showed up in D60358 and it was suggested I had a test and fix that separately.

llvm-svn: 358030
This commit is contained in:
Craig Topper 2019-04-09 19:23:37 +00:00
parent 8e2871cd2c
commit ba55a40fd0
1 changed files with 21 additions and 0 deletions

View File

@ -359,3 +359,24 @@ then:
end:
ret void
}
define void @test20(i32 %in) {
; CHECK-LABEL: @test20
%shl = shl i32 %in, 3
%zext = zext i32 %shl to i64
%and = and i64 %zext, 32
%cond = icmp eq i64 %and, 0
br i1 %cond, label %then, label %end
; FIXME: Should be no lsl
; CHECK: lsl w8, w0, #3
; CHECK: tbnz w8, #5
then:
call void @t()
br label %end
end:
ret void
}