forked from OSchip/llvm-project
Fix an optimization put in for accessing static globals. This obviates
the need to build PIC. llvm-svn: 22512
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@ -45,7 +45,6 @@ namespace {
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PPC32TargetLowering(TargetMachine &TM) : TargetLowering(TM) {
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// Fold away setcc operations if possible.
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setSetCCIsExpensive();
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PICEnabled = true;
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// Set up the register classes.
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addRegisterClass(MVT::i32, PPC32::GPRCRegisterClass);
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@ -1438,9 +1437,10 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
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if (GV->hasWeakLinkage() || GV->isExternal()) {
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Tmp2 = MakeReg(MVT::i32);
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BuildMI(BB, PPC::LWZ, 2, Tmp2).addGlobalAddress(GV).addReg(Tmp1);
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Tmp1 = Tmp2;
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BuildMI(BB, Opc, 2, Result).addSImm(0).addReg(Tmp2);
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} else {
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BuildMI(BB, Opc, 2, Result).addGlobalAddress(GV).addReg(Tmp1);
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}
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BuildMI(BB, Opc, 2, Result).addGlobalAddress(GV).addReg(Tmp1);
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} else {
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int offset;
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bool idx = SelectAddr(Address, Tmp1, offset);
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@ -2491,9 +2491,10 @@ void ISel::Select(SDOperand N) {
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if (GV->hasWeakLinkage() || GV->isExternal()) {
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Tmp3 = MakeReg(MVT::i32);
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BuildMI(BB, PPC::LWZ, 2, Tmp3).addGlobalAddress(GV).addReg(Tmp2);
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Tmp2 = Tmp3;
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BuildMI(BB, Opc, 3).addReg(Tmp1).addSImm(0).addReg(Tmp3);
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} else {
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BuildMI(BB, Opc, 3).addReg(Tmp1).addGlobalAddress(GV).addReg(Tmp2);
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}
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BuildMI(BB, Opc, 3).addReg(Tmp1).addGlobalAddress(GV).addReg(Tmp2);
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} else {
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int offset;
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bool idx = SelectAddr(Address, Tmp2, offset);
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