Add missing mayLoad / mayStore flags to instruction definitions without patterns,

which fixes all of the CodeGen/MBlaze verifier failures.

llvm-svn: 131595
This commit is contained in:
Cameron Zwarich 2011-05-18 23:03:10 +00:00
parent 30243c74c0
commit b9bef106c6
1 changed files with 5 additions and 0 deletions

View File

@ -245,20 +245,25 @@ class PatCmp<bits<6> op, bits<11> flags, string instr_asm> :
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Memory Access Instructions // Memory Access Instructions
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
let mayLoad = 1 in {
class LoadM<bits<6> op, bits<11> flags, string instr_asm> : class LoadM<bits<6> op, bits<11> flags, string instr_asm> :
TA<op, flags, (outs GPR:$dst), (ins memrr:$addr), TA<op, flags, (outs GPR:$dst), (ins memrr:$addr),
!strconcat(instr_asm, " $dst, $addr"), !strconcat(instr_asm, " $dst, $addr"),
[], IIC_MEMl>; [], IIC_MEMl>;
}
class LoadMI<bits<6> op, string instr_asm, PatFrag OpNode> : class LoadMI<bits<6> op, string instr_asm, PatFrag OpNode> :
TB<op, (outs GPR:$dst), (ins memri:$addr), TB<op, (outs GPR:$dst), (ins memri:$addr),
!strconcat(instr_asm, " $dst, $addr"), !strconcat(instr_asm, " $dst, $addr"),
[(set (i32 GPR:$dst), (OpNode iaddr:$addr))], IIC_MEMl>; [(set (i32 GPR:$dst), (OpNode iaddr:$addr))], IIC_MEMl>;
let mayStore = 1 in {
class StoreM<bits<6> op, bits<11> flags, string instr_asm> : class StoreM<bits<6> op, bits<11> flags, string instr_asm> :
TA<op, flags, (outs), (ins GPR:$dst, memrr:$addr), TA<op, flags, (outs), (ins GPR:$dst, memrr:$addr),
!strconcat(instr_asm, " $dst, $addr"), !strconcat(instr_asm, " $dst, $addr"),
[], IIC_MEMs>; [], IIC_MEMs>;
}
class StoreMI<bits<6> op, string instr_asm, PatFrag OpNode> : class StoreMI<bits<6> op, string instr_asm, PatFrag OpNode> :
TB<op, (outs), (ins GPR:$dst, memri:$addr), TB<op, (outs), (ins GPR:$dst, memri:$addr),