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[X86][SSE] Refreshed tests (missing AVX512 patterns) 

llvm-svn: 251238
This commit is contained in:
Simon Pilgrim 2015-10-25 15:39:22 +00:00
parent 092858588a
commit b9ab397647
1 changed files with 270 additions and 0 deletions
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270
llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll
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@ -24,6 +24,11 @@ define <2 x i64> @shuffle_v2i64_00(<2 x i64> %a, <2 x i64> %b) {
; AVX2: # BB#0:
; AVX2-NEXT: vpbroadcastq %xmm0, %xmm0
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_00:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpbroadcastq %xmm0, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 0>
ret <2 x i64> %shuffle
}
@ -37,6 +42,11 @@ define <2 x i64> @shuffle_v2i64_10(<2 x i64> %a, <2 x i64> %b) {
; AVX: # BB#0:
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_10:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 0>
ret <2 x i64> %shuffle
}
@ -50,6 +60,11 @@ define <2 x i64> @shuffle_v2i64_11(<2 x i64> %a, <2 x i64> %b) {
; AVX: # BB#0:
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_11:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 1>
ret <2 x i64> %shuffle
}
@ -68,6 +83,11 @@ define <2 x i64> @shuffle_v2i64_22(<2 x i64> %a, <2 x i64> %b) {
; AVX2: # BB#0:
; AVX2-NEXT: vpbroadcastq %xmm1, %xmm0
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_22:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpbroadcastq %xmm1, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 2>
ret <2 x i64> %shuffle
}
@ -81,6 +101,11 @@ define <2 x i64> @shuffle_v2i64_32(<2 x i64> %a, <2 x i64> %b) {
; AVX: # BB#0:
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_32:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 2>
ret <2 x i64> %shuffle
}
@ -94,6 +119,11 @@ define <2 x i64> @shuffle_v2i64_33(<2 x i64> %a, <2 x i64> %b) {
; AVX: # BB#0:
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_33:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 3>
ret <2 x i64> %shuffle
}
@ -123,6 +153,11 @@ define <2 x double> @shuffle_v2f64_00(<2 x double> %a, <2 x double> %b) {
; AVX: # BB#0:
; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2f64_00:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 0>
ret <2 x double> %shuffle
}
@ -155,6 +190,11 @@ define <2 x double> @shuffle_v2f64_11(<2 x double> %a, <2 x double> %b) {
; AVX: # BB#0:
; AVX-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2f64_11:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovhlps %xmm0, %xmm0, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 1>
ret <2 x double> %shuffle
}
@ -184,6 +224,11 @@ define <2 x double> @shuffle_v2f64_22(<2 x double> %a, <2 x double> %b) {
; AVX: # BB#0:
; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm1[0,0]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2f64_22:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovddup {{.*#+}} xmm0 = xmm1[0,0]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 2, i32 2>
ret <2 x double> %shuffle
}
@ -218,6 +263,11 @@ define <2 x double> @shuffle_v2f64_33(<2 x double> %a, <2 x double> %b) {
; AVX: # BB#0:
; AVX-NEXT: vmovhlps {{.*#+}} xmm0 = xmm1[1,1]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2f64_33:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovhlps %xmm1, %xmm1, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 3, i32 3>
ret <2 x double> %shuffle
}
@ -249,6 +299,11 @@ define <2 x double> @shuffle_v2f64_03(<2 x double> %a, <2 x double> %b) {
; AVX: # BB#0:
; AVX-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2f64_03:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 3>
ret <2 x double> %shuffle
}
@ -277,6 +332,11 @@ define <2 x double> @shuffle_v2f64_21(<2 x double> %a, <2 x double> %b) {
; AVX: # BB#0:
; AVX-NEXT: vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2f64_21:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 2, i32 1>
ret <2 x double> %shuffle
}
@ -292,6 +352,11 @@ define <2 x i64> @shuffle_v2i64_02(<2 x i64> %a, <2 x i64> %b) {
; AVX: # BB#0:
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_02:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpunpcklqdq %xmm1, %xmm0, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
ret <2 x i64> %shuffle
}
@ -306,6 +371,11 @@ define <2 x i64> @shuffle_v2i64_02_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64
; AVX: # BB#0:
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm2[0]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_02_copy:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpunpcklqdq %xmm2, %xmm1, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
ret <2 x i64> %shuffle
}
@ -342,6 +412,11 @@ define <2 x i64> @shuffle_v2i64_03(<2 x i64> %a, <2 x i64> %b) {
; AVX2: # BB#0:
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_03:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 3>
ret <2 x i64> %shuffle
}
@ -379,6 +454,11 @@ define <2 x i64> @shuffle_v2i64_03_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64
; AVX2: # BB#0:
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm2[2,3]
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_03_copy:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm2[2,3]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 3>
ret <2 x i64> %shuffle
}
@ -409,6 +489,11 @@ define <2 x i64> @shuffle_v2i64_12(<2 x i64> %a, <2 x i64> %b) {
; AVX: # BB#0:
; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_12:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2>
ret <2 x i64> %shuffle
}
@ -441,6 +526,11 @@ define <2 x i64> @shuffle_v2i64_12_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64
; AVX: # BB#0:
; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm2[0,1,2,3,4,5,6,7]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_12_copy:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm2[0,1,2,3,4,5,6,7]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2>
ret <2 x i64> %shuffle
}
@ -454,6 +544,11 @@ define <2 x i64> @shuffle_v2i64_13(<2 x i64> %a, <2 x i64> %b) {
; AVX: # BB#0:
; AVX-NEXT: vpunpckhqdq {{.*#+}} xmm0 = xmm0[1],xmm1[1]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_13:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpunpckhqdq %xmm1, %xmm0, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
ret <2 x i64> %shuffle
}
@ -468,6 +563,11 @@ define <2 x i64> @shuffle_v2i64_13_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64
; AVX: # BB#0:
; AVX-NEXT: vpunpckhqdq {{.*#+}} xmm0 = xmm1[1],xmm2[1]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_13_copy:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpunpckhqdq %xmm2, %xmm1, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
ret <2 x i64> %shuffle
}
@ -482,6 +582,11 @@ define <2 x i64> @shuffle_v2i64_20(<2 x i64> %a, <2 x i64> %b) {
; AVX: # BB#0:
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_20:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpunpcklqdq %xmm0, %xmm1, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 0>
ret <2 x i64> %shuffle
}
@ -496,6 +601,11 @@ define <2 x i64> @shuffle_v2i64_20_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64
; AVX: # BB#0:
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm2[0],xmm1[0]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_20_copy:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpunpcklqdq %xmm1, %xmm2, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 0>
ret <2 x i64> %shuffle
}
@ -529,6 +639,11 @@ define <2 x i64> @shuffle_v2i64_21(<2 x i64> %a, <2 x i64> %b) {
; AVX2: # BB#0:
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_21:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 1>
ret <2 x i64> %shuffle
}
@ -566,6 +681,11 @@ define <2 x i64> @shuffle_v2i64_21_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64
; AVX2: # BB#0:
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm2[0,1],xmm1[2,3]
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_21_copy:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm2[0,1],xmm1[2,3]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 1>
ret <2 x i64> %shuffle
}
@ -596,6 +716,11 @@ define <2 x i64> @shuffle_v2i64_30(<2 x i64> %a, <2 x i64> %b) {
; AVX: # BB#0:
; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_30:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 0>
ret <2 x i64> %shuffle
}
@ -628,6 +753,11 @@ define <2 x i64> @shuffle_v2i64_30_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64
; AVX: # BB#0:
; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm2[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_30_copy:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpalignr {{.*#+}} xmm0 = xmm2[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 0>
ret <2 x i64> %shuffle
}
@ -642,6 +772,11 @@ define <2 x i64> @shuffle_v2i64_31(<2 x i64> %a, <2 x i64> %b) {
; AVX: # BB#0:
; AVX-NEXT: vpunpckhqdq {{.*#+}} xmm0 = xmm1[1],xmm0[1]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_31:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpunpckhqdq %xmm0, %xmm1, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 1>
ret <2 x i64> %shuffle
}
@ -656,6 +791,11 @@ define <2 x i64> @shuffle_v2i64_31_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64
; AVX: # BB#0:
; AVX-NEXT: vpunpckhqdq {{.*#+}} xmm0 = xmm2[1],xmm1[1]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_31_copy:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpunpckhqdq %xmm1, %xmm2, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 1>
ret <2 x i64> %shuffle
}
@ -670,6 +810,11 @@ define <2 x i64> @shuffle_v2i64_0z(<2 x i64> %a) {
; AVX: # BB#0:
; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_0z:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovq %xmm0, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32> <i32 0, i32 3>
ret <2 x i64> %shuffle
}
@ -684,6 +829,11 @@ define <2 x i64> @shuffle_v2i64_1z(<2 x i64> %a) {
; AVX: # BB#0:
; AVX-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_1z:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32> <i32 1, i32 3>
ret <2 x i64> %shuffle
}
@ -698,6 +848,11 @@ define <2 x i64> @shuffle_v2i64_z0(<2 x i64> %a) {
; AVX: # BB#0:
; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_z0:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32> <i32 2, i32 0>
ret <2 x i64> %shuffle
}
@ -738,6 +893,12 @@ define <2 x i64> @shuffle_v2i64_z1(<2 x i64> %a) {
; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2i64_z1:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32> <i32 2, i32 1>
ret <2 x i64> %shuffle
}
@ -752,6 +913,11 @@ define <2 x double> @shuffle_v2f64_0z(<2 x double> %a) {
; AVX: # BB#0:
; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2f64_0z:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovq %xmm0, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> zeroinitializer, <2 x i32> <i32 0, i32 3>
ret <2 x double> %shuffle
}
@ -768,6 +934,12 @@ define <2 x double> @shuffle_v2f64_1z(<2 x double> %a) {
; AVX-NEXT: vxorpd %xmm1, %xmm1, %xmm1
; AVX-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2f64_1z:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX512VL-NEXT: vunpckhpd %xmm1, %xmm0, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> zeroinitializer, <2 x i32> <i32 1, i32 3>
ret <2 x double> %shuffle
}
@ -785,6 +957,12 @@ define <2 x double> @shuffle_v2f64_z0(<2 x double> %a) {
; AVX-NEXT: vxorpd %xmm1, %xmm1, %xmm1
; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2f64_z0:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX512VL-NEXT: vunpcklpd %xmm0, %xmm1, %xmm0
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> zeroinitializer, <2 x i32> <i32 2, i32 0>
ret <2 x double> %shuffle
}
@ -819,6 +997,12 @@ define <2 x double> @shuffle_v2f64_z1(<2 x double> %a) {
; AVX-NEXT: vxorpd %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2f64_z1:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vxorpd %xmm1, %xmm1, %xmm1
; AVX512VL-NEXT: vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; AVX512VL-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> zeroinitializer, <2 x i32> <i32 2, i32 1>
ret <2 x double> %shuffle
}
@ -835,6 +1019,12 @@ define <2 x double> @shuffle_v2f64_bitcast_1z(<2 x double> %a) {
; AVX-NEXT: vxorpd %xmm1, %xmm1, %xmm1
; AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v2f64_bitcast_1z:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX512VL-NEXT: vshufpd $1, %xmm1, %xmm0, %xmm0
; AVX512VL-NEXT: retq
%shuffle64 = shufflevector <2 x double> %a, <2 x double> zeroinitializer, <2 x i32> <i32 2, i32 1>
%bitcast32 = bitcast <2 x double> %shuffle64 to <4 x float>
%shuffle32 = shufflevector <4 x float> %bitcast32, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
@ -912,6 +1102,11 @@ define <2 x i64> @insert_reg_and_zero_v2i64(i64 %a) {
; AVX: # BB#0:
; AVX-NEXT: vmovq %rdi, %xmm0
; AVX-NEXT: retq
;
; AVX512VL-LABEL: insert_reg_and_zero_v2i64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovq %rdi, %xmm0
; AVX512VL-NEXT: retq
%v = insertelement <2 x i64> undef, i64 %a, i32 0
%shuffle = shufflevector <2 x i64> %v, <2 x i64> zeroinitializer, <2 x i32> <i32 0, i32 3>
ret <2 x i64> %shuffle
@ -927,6 +1122,11 @@ define <2 x i64> @insert_mem_and_zero_v2i64(i64* %ptr) {
; AVX: # BB#0:
; AVX-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX-NEXT: retq
;
; AVX512VL-LABEL: insert_mem_and_zero_v2i64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovq (%rdi), %xmm0
; AVX512VL-NEXT: retq
%a = load i64, i64* %ptr
%v = insertelement <2 x i64> undef, i64 %a, i32 0
%shuffle = shufflevector <2 x i64> %v, <2 x i64> zeroinitializer, <2 x i32> <i32 0, i32 3>
@ -943,6 +1143,11 @@ define <2 x double> @insert_reg_and_zero_v2f64(double %a) {
; AVX: # BB#0:
; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; AVX-NEXT: retq
;
; AVX512VL-LABEL: insert_reg_and_zero_v2f64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovq %xmm0, %xmm0
; AVX512VL-NEXT: retq
%v = insertelement <2 x double> undef, double %a, i32 0
%shuffle = shufflevector <2 x double> %v, <2 x double> zeroinitializer, <2 x i32> <i32 0, i32 3>
ret <2 x double> %shuffle
@ -958,6 +1163,11 @@ define <2 x double> @insert_mem_and_zero_v2f64(double* %ptr) {
; AVX: # BB#0:
; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; AVX-NEXT: retq
;
; AVX512VL-LABEL: insert_mem_and_zero_v2f64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovsd (%rdi), %xmm0
; AVX512VL-NEXT: retq
%a = load double, double* %ptr
%v = insertelement <2 x double> undef, double %a, i32 0
%shuffle = shufflevector <2 x double> %v, <2 x double> zeroinitializer, <2 x i32> <i32 0, i32 3>
@ -1000,6 +1210,12 @@ define <2 x i64> @insert_reg_lo_v2i64(i64 %a, <2 x i64> %b) {
; AVX2-NEXT: vmovq %rdi, %xmm1
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: insert_reg_lo_v2i64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovq %rdi, %xmm1
; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
; AVX512VL-NEXT: retq
%v = insertelement <2 x i64> undef, i64 %a, i32 0
%shuffle = shufflevector <2 x i64> %v, <2 x i64> %b, <2 x i32> <i32 0, i32 3>
ret <2 x i64> %shuffle
@ -1038,6 +1254,12 @@ define <2 x i64> @insert_mem_lo_v2i64(i64* %ptr, <2 x i64> %b) {
; AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: insert_mem_lo_v2i64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovq (%rdi), %xmm1
; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
; AVX512VL-NEXT: retq
%a = load i64, i64* %ptr
%v = insertelement <2 x i64> undef, i64 %a, i32 0
%shuffle = shufflevector <2 x i64> %v, <2 x i64> %b, <2 x i32> <i32 0, i32 3>
@ -1056,6 +1278,12 @@ define <2 x i64> @insert_reg_hi_v2i64(i64 %a, <2 x i64> %b) {
; AVX-NEXT: vmovq %rdi, %xmm1
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: insert_reg_hi_v2i64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovq %rdi, %xmm1
; AVX512VL-NEXT: vpunpcklqdq %xmm1, %xmm0, %xmm0
; AVX512VL-NEXT: retq
%v = insertelement <2 x i64> undef, i64 %a, i32 0
%shuffle = shufflevector <2 x i64> %v, <2 x i64> %b, <2 x i32> <i32 2, i32 0>
ret <2 x i64> %shuffle
@ -1073,6 +1301,12 @@ define <2 x i64> @insert_mem_hi_v2i64(i64* %ptr, <2 x i64> %b) {
; AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: insert_mem_hi_v2i64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovq (%rdi), %xmm1
; AVX512VL-NEXT: vpunpcklqdq %xmm1, %xmm0, %xmm0
; AVX512VL-NEXT: retq
%a = load i64, i64* %ptr
%v = insertelement <2 x i64> undef, i64 %a, i32 0
%shuffle = shufflevector <2 x i64> %v, <2 x i64> %b, <2 x i32> <i32 2, i32 0>
@ -1090,6 +1324,11 @@ define <2 x double> @insert_reg_lo_v2f64(double %a, <2 x double> %b) {
; AVX: # BB#0:
; AVX-NEXT: vmovsd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: insert_reg_lo_v2f64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovsd %xmm0, %xmm1, %xmm0
; AVX512VL-NEXT: retq
%v = insertelement <2 x double> undef, double %a, i32 0
%shuffle = shufflevector <2 x double> %v, <2 x double> %b, <2 x i32> <i32 0, i32 3>
ret <2 x double> %shuffle
@ -1105,6 +1344,11 @@ define <2 x double> @insert_mem_lo_v2f64(double* %ptr, <2 x double> %b) {
; AVX: # BB#0:
; AVX-NEXT: vmovlpd (%rdi), %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512VL-LABEL: insert_mem_lo_v2f64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovlpd (%rdi), %xmm0, %xmm0
; AVX512VL-NEXT: retq
%a = load double, double* %ptr
%v = insertelement <2 x double> undef, double %a, i32 0
%shuffle = shufflevector <2 x double> %v, <2 x double> %b, <2 x i32> <i32 0, i32 3>
@ -1122,6 +1366,11 @@ define <2 x double> @insert_reg_hi_v2f64(double %a, <2 x double> %b) {
; AVX: # BB#0:
; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: insert_reg_hi_v2f64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vunpcklpd %xmm0, %xmm1, %xmm0
; AVX512VL-NEXT: retq
%v = insertelement <2 x double> undef, double %a, i32 0
%shuffle = shufflevector <2 x double> %v, <2 x double> %b, <2 x i32> <i32 2, i32 0>
ret <2 x double> %shuffle
@ -1137,6 +1386,11 @@ define <2 x double> @insert_mem_hi_v2f64(double* %ptr, <2 x double> %b) {
; AVX: # BB#0:
; AVX-NEXT: vmovhpd (%rdi), %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512VL-LABEL: insert_mem_hi_v2f64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovhpd (%rdi), %xmm0, %xmm0
; AVX512VL-NEXT: retq
%a = load double, double* %ptr
%v = insertelement <2 x double> undef, double %a, i32 0
%shuffle = shufflevector <2 x double> %v, <2 x double> %b, <2 x i32> <i32 2, i32 0>
@ -1168,6 +1422,11 @@ define <2 x double> @insert_dup_reg_v2f64(double %a) {
; AVX: # BB#0:
; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: insert_dup_reg_v2f64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
; AVX512VL-NEXT: retq
%v = insertelement <2 x double> undef, double %a, i32 0
%shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 0, i32 0>
ret <2 x double> %shuffle
@ -1199,6 +1458,12 @@ define <2 x double> @insert_dup_mem_v2f64(double* %ptr) {
; AVX: # BB#0:
; AVX-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
; AVX-NEXT: retq
;
; AVX512VL-LABEL: insert_dup_mem_v2f64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vmovsd (%rdi), %xmm0
; AVX512VL-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
; AVX512VL-NEXT: retq
%a = load double, double* %ptr
%v = insertelement <2 x double> undef, double %a, i32 0
%shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 0, i32 0>
@ -1222,6 +1487,11 @@ define <2 x i64> @insert_dup_mem_v2i64(i64* %ptr) {
; AVX2: # BB#0:
; AVX2-NEXT: vpbroadcastq (%rdi), %xmm0
; AVX2-NEXT: retq
;
; AVX512VL-LABEL: insert_dup_mem_v2i64:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: vpbroadcastq (%rdi), %xmm0
; AVX512VL-NEXT: retq
%tmp = load i64, i64* %ptr, align 1
%tmp1 = insertelement <2 x i64> undef, i64 %tmp, i32 0
%tmp2 = shufflevector <2 x i64> %tmp1, <2 x i64> undef, <2 x i32> zeroinitializer