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Split out register class subclassing to a separate function and clean up 

accordingly.  No functional change.

llvm-svn: 112008
This commit is contained in:
Eric Christopher 2010-08-25 00:41:18 +00:00
parent 12daf946c8
commit b97a5e358e
2 changed files with 33 additions and 29 deletions
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32
llvm/utils/TableGen/CodeGenRegisters.h
View File

@ -19,6 +19,7 @@
#include "llvm/ADT/DenseMap.h"
#include <string>
#include <vector>
#include <set>
#include <cstdlib>
namespace llvm {
@ -56,6 +57,37 @@ namespace llvm {
abort();
}
// Returns true if RC is a strict subclass.
// RC is a sub-class of this class if it is a valid replacement for any
// instruction operand where a register of this classis required. It must
// satisfy these conditions:
//
// 1. All RC registers are also in this.
// 2. The RC spill size must not be smaller than our spill size.
// 3. RC spill alignment must be compatible with ours.
//
bool hasSubClass(const CodeGenRegisterClass *RC) const {
if (RC->Elements.size() > Elements.size() ||
(SpillAlignment && RC->SpillAlignment % SpillAlignment) ||
SpillSize > RC->SpillSize)
return false;
std::set<Record*> RegSet;
for (unsigned i = 0, e = Elements.size(); i != e; ++i) {
Record *Reg = Elements[i];
RegSet.insert(Reg);
}
for (unsigned i = 0, e = RC->Elements.size(); i != e; ++i) {
Record *Reg = RC->Elements[i];
if (!RegSet.count(Reg))
return false;
}
return true;
}
CodeGenRegisterClass(Record *R);
};
}

30
llvm/utils/TableGen/RegisterInfoEmitter.cpp
View File

@ -119,16 +119,6 @@ void RegisterInfoEmitter::runHeader(raw_ostream &OS) {
OS << "} // End llvm namespace \n";
}
bool isSubRegisterClass(const CodeGenRegisterClass &RC,
std::set<Record*> &RegSet) {
for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
Record *Reg = RC.Elements[i];
if (!RegSet.count(Reg))
return false;
}
return true;
}
static void addSuperReg(Record *R, Record *S,
std::map<Record*, std::set<Record*>, LessRecord> &SubRegs,
std::map<Record*, std::set<Record*>, LessRecord> &SuperRegs,
@ -498,12 +488,6 @@ void RegisterInfoEmitter::run(raw_ostream &OS) {
// Give the register class a legal C name if it's anonymous.
std::string Name = RC.TheDef->getName();
std::set<Record*> RegSet;
for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
Record *Reg = RC.Elements[i];
RegSet.insert(Reg);
}
OS << " // " << Name
<< " Register Class sub-classes...\n"
<< " static const TargetRegisterClass* const "
@ -513,21 +497,9 @@ void RegisterInfoEmitter::run(raw_ostream &OS) {
for (unsigned rc2 = 0, e2 = RegisterClasses.size(); rc2 != e2; ++rc2) {
const CodeGenRegisterClass &RC2 = RegisterClasses[rc2];
// RC2 is a sub-class of RC if it is a valid replacement for any
// instruction operand where an RC register is required. It must satisfy
// these conditions:
//
// 1. All RC2 registers are also in RC.
// 2. The RC2 spill size must not be smaller that the RC spill size.
// 3. RC2 spill alignment must be compatible with RC.
//
// Sub-classes are used to determine if a virtual register can be used
// as an instruction operand, or if it must be copied first.
if (rc == rc2 || RC2.Elements.size() > RC.Elements.size() ||
(RC.SpillAlignment && RC2.SpillAlignment % RC.SpillAlignment) ||
RC.SpillSize > RC2.SpillSize || !isSubRegisterClass(RC2, RegSet))
continue;
if (rc == rc2 || !RC.hasSubClass(&RC2)) continue;
if (!Empty) OS << ", ";
OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass";