maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[InstCombine] fold icmp pred (sub 0, X) C for vector type 

Differential Revision: https://reviews.llvm.org/D49283

llvm-svn: 337141
This commit is contained in:
Chen Zheng 2018-07-16 00:51:40 +00:00
parent 7bb2767fba
commit b972273f98
3 changed files with 25 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
View File

@ -3154,8 +3154,8 @@ Instruction *InstCombiner::foldICmpBinOp(ICmpInst &I) {
if (NoOp0WrapProblem && ICmpInst::isSigned(Pred)) {
Value *X;
if (match(BO0, m_Neg(m_Value(X))))
if (ConstantInt *RHSC = dyn_cast<ConstantInt>(Op1))
if (!RHSC->isMinValue(/*isSigned=*/true))
if (Constant *RHSC = dyn_cast<Constant>(Op1))
if (RHSC->isNotMinSignedValue())
return new ICmpInst(I.getSwappedPredicate(), X,
ConstantExpr::getNeg(RHSC));
}

35
llvm/test/Transforms/InstCombine/abs_abs.ll
View File

@ -332,12 +332,9 @@ define i32 @abs_abs_x18(i32 %x, i32 %y) {
define <2 x i32> @abs_abs_x02_vec(<2 x i32> %x) {
; CHECK-LABEL: @abs_abs_x02_vec(
; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], <i32 -1, i32 -1>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]]
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[SUB16]], <2 x i32> [[COND]]
; CHECK-NEXT: ret <2 x i32> [[COND18]]
; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%sub = sub nsw <2 x i32> zeroinitializer, %x
%cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
@ -669,14 +666,9 @@ define i32 @nabs_nabs_x18(i32 %x, i32 %y) {
define <2 x i32> @nabs_nabs_x01_vec(<2 x i32> %x) {
; CHECK-LABEL: @nabs_nabs_x01_vec(
; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], <i32 -1, i32 -1>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[X]], <2 x i32> [[SUB]]
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[COND]], <2 x i32> [[SUB16]]
; CHECK-NEXT: ret <2 x i32> [[COND18]]
;
; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%sub = sub nsw <2 x i32> zeroinitializer, %x
%cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
@ -1008,12 +1000,9 @@ define i32 @abs_nabs_x18(i32 %x, i32 %y) {
define <2 x i32> @abs_nabs_x01_vec(<2 x i32> %x) {
; CHECK-LABEL: @abs_nabs_x01_vec(
; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], <i32 -1, i32 -1>
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[X]], <2 x i32> [[SUB]]
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[SUB16]], <2 x i32> [[COND]]
; CHECK-NEXT: ret <2 x i32> [[COND18]]
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]]
; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%sub = sub nsw <2 x i32> zeroinitializer, %x
%cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
@ -1345,13 +1334,9 @@ define i32 @nabs_abs_x18(i32 %x, i32 %y) {
define <2 x i32> @nabs_abs_x01_vec(<2 x i32> %x) {
; CHECK-LABEL: @nabs_abs_x01_vec(
; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], <i32 -1, i32 -1>
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]]
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[COND]], <2 x i32> [[SUB16]]
; CHECK-NEXT: ret <2 x i32> [[COND18]]
;
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[X]], <2 x i32> [[SUB]]
; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%sub = sub nsw <2 x i32> zeroinitializer, %x
%cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>

13
llvm/test/Transforms/InstCombine/icmp.ll
View File

@ -3341,3 +3341,16 @@ define <2 x i1> @PR36583(<2 x i8*>) {
ret <2 x i1> %res
}
; fold (icmp pred (sub (0, X)) C1) for vec type
define <2 x i32> @Op1Negated_Vec(<2 x i32> %x) {
; CHECK-LABEL: @Op1Negated_Vec(
; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]]
; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%sub = sub nsw <2 x i32> zeroinitializer, %x
%cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
%cond = select <2 x i1> %cmp, <2 x i32> %sub, <2 x i32> %x
ret <2 x i32> %cond
}