forked from OSchip/llvm-project
Implement aarch64 neon instruction set AdvSIMD (Across).
llvm-svn: 192029
This commit is contained in:
Jiangning Liu
parent
ad242fbb71
commit
b96ebac02b
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@ -165,6 +165,7 @@ class NoTestOpInst<string n, string p, string t, Op o> : Inst<n, p, t, o> {}
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// i: constant int
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// l: constant uint64
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// s: scalar of element type
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// r: scalar of double width element type
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// a: scalar of element type (splat to vector type)
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// k: default elt width, double num elts
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// #: array of default vectors
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@ -696,6 +697,15 @@ def VQRDMULH_LANEQ : SOpInst<"vqrdmulh_laneq", "ddji", "siQsQi", OP_QRDMULH_LN>;
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def VMULX_LANE : IOpInst<"vmulx_lane", "ddgi", "fdQfQd", OP_MULX_LN>;
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def VMULX_LANEQ : IOpInst<"vmulx_laneq", "ddji", "fdQfQd", OP_MULX_LN>;
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////////////////////////////////////////////////////////////////////////////////
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// Across vectors class
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def VADDLV : SInst<"vaddlv", "rd", "csiUcUsUiQcQsQiQUcQUsQUi">;
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def VMAXV : SInst<"vmaxv", "sd", "csiUcUsUiQcQsQiQUcQUsQUiQf">;
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def VMINV : SInst<"vminv", "sd", "csiUcUsUiQcQsQiQUcQUsQUiQf">;
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def VADDV : SInst<"vaddv", "sd", "csiUcUsUiQcQsQiQUcQUsQUi">;
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def FMAXNMV : SInst<"vmaxnmv", "sd", "Qf">;
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def FMINNMV : SInst<"vminnmv", "sd", "Qf">;
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////////////////////////////////////////////////////////////////////////////////
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// Scalar Arithmetic
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@ -1748,209 +1748,245 @@ CodeGenFunction::EmitPointerWithAlignment(const Expr *Addr) {
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static Value *EmitAArch64ScalarBuiltinExpr(CodeGenFunction &CGF,
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unsigned BuiltinID,
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const CallExpr *E) {
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NeonTypeFlags::EltType ET;
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bool usgn;
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unsigned int Int = 0;
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bool OverloadInt = true;
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// Scalar result generated across vectors
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bool AcrossVec = false;
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// Extend element of one-element vector
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bool ExtendEle = false;
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bool OverloadInt = false;
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const char *s = NULL;
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SmallVector<Value *, 4> Ops;
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for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) {
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Ops.push_back(CGF.EmitScalarExpr(E->getArg(i)));
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}
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// AArch64 scalar builtins are not overloaded, they do not have an extra
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// argument that specifies the vector type, need to handle each case.
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switch (BuiltinID) {
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default: break;
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// Scalar Add
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case AArch64::BI__builtin_neon_vaddd_s64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vaddds;
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s = "vaddds"; usgn = false; OverloadInt = false; break;
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Int = Intrinsic::aarch64_neon_vaddds;
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s = "vaddds"; break;
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case AArch64::BI__builtin_neon_vaddd_u64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vadddu;
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s = "vadddu"; usgn = true; OverloadInt = false; break;
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Int = Intrinsic::aarch64_neon_vadddu;
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s = "vadddu"; break;
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// Scalar Sub
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case AArch64::BI__builtin_neon_vsubd_s64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vsubds;
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s = "vsubds"; usgn = false; OverloadInt = false; break;
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Int = Intrinsic::aarch64_neon_vsubds;
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s = "vsubds"; break;
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case AArch64::BI__builtin_neon_vsubd_u64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vsubdu;
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s = "vsubdu"; usgn = true; OverloadInt = false; break;
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Int = Intrinsic::aarch64_neon_vsubdu;
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s = "vsubdu"; break;
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// Scalar Saturating Add
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case AArch64::BI__builtin_neon_vqaddb_s8:
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ET = NeonTypeFlags::Int8; Int = Intrinsic::aarch64_neon_vqadds;
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s = "vqadds"; usgn = false; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqaddh_s16:
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ET = NeonTypeFlags::Int16; Int = Intrinsic::aarch64_neon_vqadds;
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s = "vqadds"; usgn = false; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqadds_s32:
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ET = NeonTypeFlags::Int32; Int = Intrinsic::aarch64_neon_vqadds;
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s = "vqadds"; usgn = false; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqaddd_s64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vqadds;
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s = "vqadds"; usgn = false; OverloadInt = true; break;
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Int = Intrinsic::aarch64_neon_vqadds;
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s = "vqadds"; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqaddb_u8:
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ET = NeonTypeFlags::Int8; Int = Intrinsic::aarch64_neon_vqaddu;
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s = "vqaddu"; usgn = true; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqaddh_u16:
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ET = NeonTypeFlags::Int16; Int = Intrinsic::aarch64_neon_vqaddu;
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s = "vqaddu"; usgn = true; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqadds_u32:
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ET = NeonTypeFlags::Int32; Int = Intrinsic::aarch64_neon_vqaddu;
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s = "vqaddu"; usgn = true; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqaddd_u64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vqaddu;
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s = "vqaddu"; usgn = true; OverloadInt = true; break;
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Int = Intrinsic::aarch64_neon_vqaddu;
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s = "vqaddu"; OverloadInt = true; break;
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// Scalar Saturating Sub
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case AArch64::BI__builtin_neon_vqsubb_s8:
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ET = NeonTypeFlags::Int8; Int = Intrinsic::aarch64_neon_vqsubs;
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s = "vqsubs"; usgn = false; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqsubh_s16:
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ET = NeonTypeFlags::Int16; Int = Intrinsic::aarch64_neon_vqsubs;
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s = "vqsubs"; usgn = false; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqsubs_s32:
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ET = NeonTypeFlags::Int32; Int = Intrinsic::aarch64_neon_vqsubs;
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s = "vqsubs"; usgn = false; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqsubd_s64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vqsubs;
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s = "vqsubs"; usgn = false; OverloadInt = true; break;
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Int = Intrinsic::aarch64_neon_vqsubs;
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s = "vqsubs"; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqsubb_u8:
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ET = NeonTypeFlags::Int8; Int = Intrinsic::aarch64_neon_vqsubu;
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s = "vqsubu"; usgn = true; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqsubh_u16:
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ET = NeonTypeFlags::Int16; Int = Intrinsic::aarch64_neon_vqsubu;
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s = "vqsubu"; usgn = true; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqsubs_u32:
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ET = NeonTypeFlags::Int32; Int = Intrinsic::aarch64_neon_vqsubu;
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s = "vqsubu"; usgn = true; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqsubd_u64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vqsubu;
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s = "vqsubu"; usgn = true; OverloadInt = true; break;
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Int = Intrinsic::aarch64_neon_vqsubu;
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s = "vqsubu"; OverloadInt = true; break;
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// Scalar Shift Left
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case AArch64::BI__builtin_neon_vshld_s64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vshlds;
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s = "vshlds"; usgn = false; OverloadInt=false; break;
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Int = Intrinsic::aarch64_neon_vshlds;
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s = "vshlds"; break;
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case AArch64::BI__builtin_neon_vshld_u64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vshldu;
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s = "vshldu"; usgn = true; OverloadInt = false; break;
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Int = Intrinsic::aarch64_neon_vshldu;
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s = "vshldu"; break;
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// Scalar Saturating Shift Left
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case AArch64::BI__builtin_neon_vqshlb_s8:
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ET = NeonTypeFlags::Int8; Int = Intrinsic::aarch64_neon_vqshls;
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s = "vqshls"; usgn = false; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqshlh_s16:
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ET = NeonTypeFlags::Int16; Int = Intrinsic::aarch64_neon_vqshls;
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s = "vqshls"; usgn = false; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqshls_s32:
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ET = NeonTypeFlags::Int32; Int = Intrinsic::aarch64_neon_vqshls;
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s = "vqshls"; usgn = false; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqshld_s64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vqshls;
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s = "vqshls"; usgn = false; OverloadInt = true; break;
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Int = Intrinsic::aarch64_neon_vqshls;
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s = "vqshls"; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqshlb_u8:
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ET = NeonTypeFlags::Int8; Int = Intrinsic::aarch64_neon_vqshlu;
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s = "vqshlu"; usgn = true; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqshlh_u16:
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ET = NeonTypeFlags::Int16; Int = Intrinsic::aarch64_neon_vqshlu;
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s = "vqshlu"; usgn = true; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqshls_u32:
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ET = NeonTypeFlags::Int32; Int = Intrinsic::aarch64_neon_vqshlu;
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s = "vqshlu"; usgn = true; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqshld_u64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vqshlu;
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s = "vqshlu"; usgn = true; OverloadInt = true; break;
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Int = Intrinsic::aarch64_neon_vqshlu;
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s = "vqshlu"; OverloadInt = true; break;
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// Scalar Rouding Shift Left
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case AArch64::BI__builtin_neon_vrshld_s64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vrshlds;
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s = "vrshlds"; usgn = false; OverloadInt=false; break;
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Int = Intrinsic::aarch64_neon_vrshlds;
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s = "vrshlds"; break;
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case AArch64::BI__builtin_neon_vrshld_u64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vrshldu;
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s = "vrshldu"; usgn = true; OverloadInt=false; break;
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Int = Intrinsic::aarch64_neon_vrshldu;
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s = "vrshldu"; break;
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// Scalar Saturating Rouding Shift Left
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case AArch64::BI__builtin_neon_vqrshlb_s8:
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ET = NeonTypeFlags::Int8; Int = Intrinsic::aarch64_neon_vqrshls;
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s = "vqrshls"; usgn = false; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqrshlh_s16:
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ET = NeonTypeFlags::Int16; Int = Intrinsic::aarch64_neon_vqrshls;
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s = "vqrshls"; usgn = false; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqrshls_s32:
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ET = NeonTypeFlags::Int32; Int = Intrinsic::aarch64_neon_vqrshls;
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s = "vqrshls"; usgn = false; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqrshld_s64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vqrshls;
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s = "vqrshls"; usgn = false; OverloadInt = true; break;
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Int = Intrinsic::aarch64_neon_vqrshls;
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s = "vqrshls"; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqrshlb_u8:
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ET = NeonTypeFlags::Int8; Int = Intrinsic::aarch64_neon_vqrshlu;
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s = "vqrshlu"; usgn = true; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqrshlh_u16:
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ET = NeonTypeFlags::Int16; Int = Intrinsic::aarch64_neon_vqrshlu;
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s = "vqrshlu"; usgn = true; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqrshls_u32:
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ET = NeonTypeFlags::Int32; Int = Intrinsic::aarch64_neon_vqrshlu;
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s = "vqrshlu"; usgn = true; OverloadInt = true; break;
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case AArch64::BI__builtin_neon_vqrshld_u64:
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ET = NeonTypeFlags::Int64; Int = Intrinsic::aarch64_neon_vqrshlu;
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s = "vqrshlu"; usgn = true; OverloadInt = true; break;
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Int = Intrinsic::aarch64_neon_vqrshlu;
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s = "vqrshlu"; OverloadInt = true; break;
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// Scalar Reduce Pairwise Add
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case AArch64::BI__builtin_neon_vpaddd_s64:
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Int = Intrinsic::aarch64_neon_vpadd; s = "vpadd";
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OverloadInt = false; break;
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break;
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case AArch64::BI__builtin_neon_vpadds_f32:
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Int = Intrinsic::aarch64_neon_vpfadd; s = "vpfadd";
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OverloadInt = false; break;
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break;
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case AArch64::BI__builtin_neon_vpaddd_f64:
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Int = Intrinsic::aarch64_neon_vpfaddq; s = "vpfaddq";
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OverloadInt = false; break;
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break;
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// Scalar Reduce Pairwise Floating Point Max
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case AArch64::BI__builtin_neon_vpmaxs_f32:
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Int = Intrinsic::aarch64_neon_vpmax; s = "vpmax";
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OverloadInt = false; break;
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break;
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case AArch64::BI__builtin_neon_vpmaxqd_f64:
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Int = Intrinsic::aarch64_neon_vpmaxq; s = "vpmaxq";
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OverloadInt = false; break;
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break;
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// Scalar Reduce Pairwise Floating Point Min
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case AArch64::BI__builtin_neon_vpmins_f32:
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Int = Intrinsic::aarch64_neon_vpmin; s = "vpmin";
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OverloadInt = false; break;
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break;
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case AArch64::BI__builtin_neon_vpminqd_f64:
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Int = Intrinsic::aarch64_neon_vpminq; s = "vpminq";
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OverloadInt = false; break;
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break;
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// Scalar Reduce Pairwise Floating Point Maxnm
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case AArch64::BI__builtin_neon_vpmaxnms_f32:
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Int = Intrinsic::aarch64_neon_vpfmaxnm; s = "vpfmaxnm";
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OverloadInt = false; break;
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break;
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case AArch64::BI__builtin_neon_vpmaxnmqd_f64:
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Int = Intrinsic::aarch64_neon_vpfmaxnmq; s = "vpfmaxnmq";
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OverloadInt = false; break;
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// Scalar Reduce Pairwise Floating Point Minnm
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break;
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// Scalar Reduce Pairwise Floating Point Minnm
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case AArch64::BI__builtin_neon_vpminnms_f32:
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Int = Intrinsic::aarch64_neon_vpfminnm; s = "vpfminnm";
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OverloadInt = false; break;
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break;
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case AArch64::BI__builtin_neon_vpminnmqd_f64:
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Int = Intrinsic::aarch64_neon_vpfminnmq; s = "vpfminnmq";
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OverloadInt = false; break;
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break;
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// The followings are intrinsics with scalar results generated AcrossVec vectors
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case AArch64::BI__builtin_neon_vaddlv_s8:
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case AArch64::BI__builtin_neon_vaddlv_s16:
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case AArch64::BI__builtin_neon_vaddlvq_s8:
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case AArch64::BI__builtin_neon_vaddlvq_s16:
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case AArch64::BI__builtin_neon_vaddlvq_s32:
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Int = Intrinsic::aarch64_neon_saddlv;
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AcrossVec = true; ExtendEle = true; s = "saddlv"; break;
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case AArch64::BI__builtin_neon_vaddlv_u8:
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case AArch64::BI__builtin_neon_vaddlv_u16:
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case AArch64::BI__builtin_neon_vaddlvq_u8:
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case AArch64::BI__builtin_neon_vaddlvq_u16:
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case AArch64::BI__builtin_neon_vaddlvq_u32:
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Int = Intrinsic::aarch64_neon_uaddlv;
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AcrossVec = true; ExtendEle = true; s = "uaddlv"; break;
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case AArch64::BI__builtin_neon_vmaxv_s8:
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case AArch64::BI__builtin_neon_vmaxv_s16:
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case AArch64::BI__builtin_neon_vmaxvq_s8:
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case AArch64::BI__builtin_neon_vmaxvq_s16:
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case AArch64::BI__builtin_neon_vmaxvq_s32:
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Int = Intrinsic::aarch64_neon_smaxv;
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AcrossVec = true; ExtendEle = false; s = "smaxv"; break;
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case AArch64::BI__builtin_neon_vmaxv_u8:
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case AArch64::BI__builtin_neon_vmaxv_u16:
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case AArch64::BI__builtin_neon_vmaxvq_u8:
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case AArch64::BI__builtin_neon_vmaxvq_u16:
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case AArch64::BI__builtin_neon_vmaxvq_u32:
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Int = Intrinsic::aarch64_neon_umaxv;
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AcrossVec = true; ExtendEle = false; s = "umaxv"; break;
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case AArch64::BI__builtin_neon_vminv_s8:
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case AArch64::BI__builtin_neon_vminv_s16:
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case AArch64::BI__builtin_neon_vminvq_s8:
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case AArch64::BI__builtin_neon_vminvq_s16:
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case AArch64::BI__builtin_neon_vminvq_s32:
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Int = Intrinsic::aarch64_neon_sminv;
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AcrossVec = true; ExtendEle = false; s = "sminv"; break;
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case AArch64::BI__builtin_neon_vminv_u8:
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case AArch64::BI__builtin_neon_vminv_u16:
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case AArch64::BI__builtin_neon_vminvq_u8:
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case AArch64::BI__builtin_neon_vminvq_u16:
|
||||
case AArch64::BI__builtin_neon_vminvq_u32:
|
||||
Int = Intrinsic::aarch64_neon_uminv;
|
||||
AcrossVec = true; ExtendEle = false; s = "uminv"; break;
|
||||
case AArch64::BI__builtin_neon_vaddv_s8:
|
||||
case AArch64::BI__builtin_neon_vaddv_s16:
|
||||
case AArch64::BI__builtin_neon_vaddvq_s8:
|
||||
case AArch64::BI__builtin_neon_vaddvq_s16:
|
||||
case AArch64::BI__builtin_neon_vaddvq_s32:
|
||||
case AArch64::BI__builtin_neon_vaddv_u8:
|
||||
case AArch64::BI__builtin_neon_vaddv_u16:
|
||||
case AArch64::BI__builtin_neon_vaddvq_u8:
|
||||
case AArch64::BI__builtin_neon_vaddvq_u16:
|
||||
case AArch64::BI__builtin_neon_vaddvq_u32:
|
||||
Int = Intrinsic::aarch64_neon_vaddv;
|
||||
AcrossVec = true; ExtendEle = false; s = "vaddv"; break;
|
||||
case AArch64::BI__builtin_neon_vmaxvq_f32:
|
||||
Int = Intrinsic::aarch64_neon_vmaxv;
|
||||
AcrossVec = true; ExtendEle = false; s = "vmaxv"; break;
|
||||
case AArch64::BI__builtin_neon_vminvq_f32:
|
||||
Int = Intrinsic::aarch64_neon_vminv;
|
||||
AcrossVec = true; ExtendEle = false; s = "vminv"; break;
|
||||
case AArch64::BI__builtin_neon_vmaxnmvq_f32:
|
||||
Int = Intrinsic::aarch64_neon_vmaxnmv;
|
||||
AcrossVec = true; ExtendEle = false; s = "vmaxnmv"; break;
|
||||
case AArch64::BI__builtin_neon_vminnmvq_f32:
|
||||
Int = Intrinsic::aarch64_neon_vminnmv;
|
||||
AcrossVec = true; ExtendEle = false; s = "vminnmv"; break;
|
||||
}
|
||||
|
||||
if (!Int)
|
||||
return 0;
|
||||
|
||||
// AArch64 scalar builtin that returns scalar type
|
||||
// and should be mapped to AArch64 intrinsic that takes
|
||||
// one-element vector type arguments and returns
|
||||
// and should be mapped to AArch64 intrinsic that returns
|
||||
// one-element vector type.
|
||||
llvm::Type *Ty = 0;
|
||||
Function *F = 0;
|
||||
if (OverloadInt) {
|
||||
SmallVector<Value *, 4> Ops;
|
||||
if (AcrossVec) {
|
||||
// Gen arg type
|
||||
const Expr *Arg = E->getArg(E->getNumArgs()-1);
|
||||
llvm::Type *Ty = CGF.ConvertType(Arg->getType());
|
||||
llvm::VectorType *VTy = cast<llvm::VectorType>(Ty);
|
||||
llvm::Type *ETy = VTy->getElementType();
|
||||
llvm::VectorType *RTy = llvm::VectorType::get(ETy, 1);
|
||||
|
||||
if (ExtendEle) {
|
||||
assert(!ETy->isFloatingPointTy());
|
||||
RTy = llvm::VectorType::getExtendedElementVectorType(RTy);
|
||||
}
|
||||
|
||||
llvm::Type *Tys[2] = {RTy, VTy};
|
||||
F = CGF.CGM.getIntrinsic(Int, Tys);
|
||||
assert(E->getNumArgs() == 1);
|
||||
}
|
||||
else if (OverloadInt) {
|
||||
// Determine the type of this overloaded AArch64 intrinsic
|
||||
NeonTypeFlags Type(ET, usgn, false);
|
||||
llvm::VectorType *VTy = GetNeonType(&CGF, Type, true);
|
||||
Ty = VTy;
|
||||
if (!Ty)
|
||||
return 0;
|
||||
F = CGF.CGM.getIntrinsic(Int, Ty);
|
||||
const Expr *Arg = E->getArg(E->getNumArgs()-1);
|
||||
llvm::Type *Ty = CGF.ConvertType(Arg->getType());
|
||||
llvm::VectorType *VTy = llvm::VectorType::get(Ty, 1);
|
||||
assert(VTy);
|
||||
|
||||
F = CGF.CGM.getIntrinsic(Int, VTy);
|
||||
} else
|
||||
F = CGF.CGM.getIntrinsic(Int);
|
||||
|
||||
for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) {
|
||||
Ops.push_back(CGF.EmitScalarExpr(E->getArg(i)));
|
||||
}
|
||||
|
||||
Value *Result = CGF.EmitNeonCall(F, Ops, s);
|
||||
llvm::Type *ResultType = CGF.ConvertType(E->getType());
|
||||
// AArch64 intrinsic one-element vector type cast to
|
||||
|
|
@ -1959,7 +1995,7 @@ static Value *EmitAArch64ScalarBuiltinExpr(CodeGenFunction &CGF,
|
|||
}
|
||||
|
||||
Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
|
||||
const CallExpr *E) {
|
||||
const CallExpr *E) {
|
||||
|
||||
// Process AArch64 scalar builtins
|
||||
if (Value *Result = EmitAArch64ScalarBuiltinExpr(*this, BuiltinID, E))
|
||||
|
|
|
|||
|
|
@ -0,0 +1,271 @@
|
|||
// REQUIRES: aarch64-registered-target
|
||||
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +neon \
|
||||
// RUN: -ffp-contract=fast -S -O3 -o - %s | FileCheck %s
|
||||
|
||||
// Test new aarch64 intrinsics and types
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
int16_t test_vaddlv_s8(int8x8_t a) {
|
||||
// CHECK: test_vaddlv_s8
|
||||
return vaddlv_s8(a);
|
||||
// CHECK: saddlv {{h[0-9]+}}, {{v[0-9]+}}.8b
|
||||
}
|
||||
|
||||
int32_t test_vaddlv_s16(int16x4_t a) {
|
||||
// CHECK: test_vaddlv_s16
|
||||
return vaddlv_s16(a);
|
||||
// CHECK: saddlv {{s[0-9]+}}, {{v[0-9]+}}.4h
|
||||
}
|
||||
|
||||
uint16_t test_vaddlv_u8(uint8x8_t a) {
|
||||
// CHECK: test_vaddlv_u8
|
||||
return vaddlv_u8(a);
|
||||
// CHECK: uaddlv {{h[0-9]+}}, {{v[0-9]+}}.8b
|
||||
}
|
||||
|
||||
uint32_t test_vaddlv_u16(uint16x4_t a) {
|
||||
// CHECK: test_vaddlv_u16
|
||||
return vaddlv_u16(a);
|
||||
// CHECK: uaddlv {{s[0-9]+}}, {{v[0-9]+}}.4h
|
||||
}
|
||||
|
||||
int16_t test_vaddlvq_s8(int8x16_t a) {
|
||||
// CHECK: test_vaddlvq_s8
|
||||
return vaddlvq_s8(a);
|
||||
// CHECK: saddlv {{h[0-9]+}}, {{v[0-9]+}}.16b
|
||||
}
|
||||
|
||||
int32_t test_vaddlvq_s16(int16x8_t a) {
|
||||
// CHECK: test_vaddlvq_s16
|
||||
return vaddlvq_s16(a);
|
||||
// CHECK: saddlv {{s[0-9]+}}, {{v[0-9]+}}.8h
|
||||
}
|
||||
|
||||
int64_t test_vaddlvq_s32(int32x4_t a) {
|
||||
// CHECK: test_vaddlvq_s32
|
||||
return vaddlvq_s32(a);
|
||||
// CHECK: saddlv {{d[0-9]+}}, {{v[0-9]+}}.4s
|
||||
}
|
||||
|
||||
uint16_t test_vaddlvq_u8(uint8x16_t a) {
|
||||
// CHECK: test_vaddlvq_u8
|
||||
return vaddlvq_u8(a);
|
||||
// CHECK: uaddlv {{h[0-9]+}}, {{v[0-9]+}}.16b
|
||||
}
|
||||
|
||||
uint32_t test_vaddlvq_u16(uint16x8_t a) {
|
||||
// CHECK: test_vaddlvq_u16
|
||||
return vaddlvq_u16(a);
|
||||
// CHECK: uaddlv {{s[0-9]+}}, {{v[0-9]+}}.8h
|
||||
}
|
||||
|
||||
uint64_t test_vaddlvq_u32(uint32x4_t a) {
|
||||
// CHECK: test_vaddlvq_u32
|
||||
return vaddlvq_u32(a);
|
||||
// CHECK: uaddlv {{d[0-9]+}}, {{v[0-9]+}}.4s
|
||||
}
|
||||
|
||||
int8_t test_vmaxv_s8(int8x8_t a) {
|
||||
// CHECK: test_vmaxv_s8
|
||||
return vmaxv_s8(a);
|
||||
// CHECK: smaxv {{b[0-9]+}}, {{v[0-9]+}}.8b
|
||||
}
|
||||
|
||||
int16_t test_vmaxv_s16(int16x4_t a) {
|
||||
// CHECK: test_vmaxv_s16
|
||||
return vmaxv_s16(a);
|
||||
// CHECK: smaxv {{h[0-9]+}}, {{v[0-9]+}}.4h
|
||||
}
|
||||
|
||||
uint8_t test_vmaxv_u8(uint8x8_t a) {
|
||||
// CHECK: test_vmaxv_u8
|
||||
return vmaxv_u8(a);
|
||||
// CHECK: umaxv {{b[0-9]+}}, {{v[0-9]+}}.8b
|
||||
}
|
||||
|
||||
uint16_t test_vmaxv_u16(uint16x4_t a) {
|
||||
// CHECK: test_vmaxv_u16
|
||||
return vmaxv_u16(a);
|
||||
// CHECK: umaxv {{h[0-9]+}}, {{v[0-9]+}}.4h
|
||||
}
|
||||
|
||||
int8_t test_vmaxvq_s8(int8x16_t a) {
|
||||
// CHECK: test_vmaxvq_s8
|
||||
return vmaxvq_s8(a);
|
||||
// CHECK: smaxv {{b[0-9]+}}, {{v[0-9]+}}.16b
|
||||
}
|
||||
|
||||
int16_t test_vmaxvq_s16(int16x8_t a) {
|
||||
// CHECK: test_vmaxvq_s16
|
||||
return vmaxvq_s16(a);
|
||||
// CHECK: smaxv {{h[0-9]+}}, {{v[0-9]+}}.8h
|
||||
}
|
||||
|
||||
int32_t test_vmaxvq_s32(int32x4_t a) {
|
||||
// CHECK: test_vmaxvq_s32
|
||||
return vmaxvq_s32(a);
|
||||
// CHECK: smaxv {{s[0-9]+}}, {{v[0-9]+}}.4s
|
||||
}
|
||||
|
||||
uint8_t test_vmaxvq_u8(uint8x16_t a) {
|
||||
// CHECK: test_vmaxvq_u8
|
||||
return vmaxvq_u8(a);
|
||||
// CHECK: umaxv {{b[0-9]+}}, {{v[0-9]+}}.16b
|
||||
}
|
||||
|
||||
uint16_t test_vmaxvq_u16(uint16x8_t a) {
|
||||
// CHECK: test_vmaxvq_u16
|
||||
return vmaxvq_u16(a);
|
||||
// CHECK: umaxv {{h[0-9]+}}, {{v[0-9]+}}.8h
|
||||
}
|
||||
|
||||
uint32_t test_vmaxvq_u32(uint32x4_t a) {
|
||||
// CHECK: test_vmaxvq_u32
|
||||
return vmaxvq_u32(a);
|
||||
// CHECK: umaxv {{s[0-9]+}}, {{v[0-9]+}}.4s
|
||||
}
|
||||
|
||||
int8_t test_vminv_s8(int8x8_t a) {
|
||||
// CHECK: test_vminv_s8
|
||||
return vminv_s8(a);
|
||||
// CHECK: sminv {{b[0-9]+}}, {{v[0-9]+}}.8b
|
||||
}
|
||||
|
||||
int16_t test_vminv_s16(int16x4_t a) {
|
||||
// CHECK: test_vminv_s16
|
||||
return vminv_s16(a);
|
||||
// CHECK: sminv {{h[0-9]+}}, {{v[0-9]+}}.4h
|
||||
}
|
||||
|
||||
uint8_t test_vminv_u8(uint8x8_t a) {
|
||||
// CHECK: test_vminv_u8
|
||||
return vminv_u8(a);
|
||||
// CHECK: uminv {{b[0-9]+}}, {{v[0-9]+}}.8b
|
||||
}
|
||||
|
||||
uint16_t test_vminv_u16(uint16x4_t a) {
|
||||
// CHECK: test_vminv_u16
|
||||
return vminv_u16(a);
|
||||
// CHECK: uminv {{h[0-9]+}}, {{v[0-9]+}}.4h
|
||||
}
|
||||
|
||||
int8_t test_vminvq_s8(int8x16_t a) {
|
||||
// CHECK: test_vminvq_s8
|
||||
return vminvq_s8(a);
|
||||
// CHECK: sminv {{b[0-9]+}}, {{v[0-9]+}}.16b
|
||||
}
|
||||
|
||||
int16_t test_vminvq_s16(int16x8_t a) {
|
||||
// CHECK: test_vminvq_s16
|
||||
return vminvq_s16(a);
|
||||
// CHECK: sminv {{h[0-9]+}}, {{v[0-9]+}}.8h
|
||||
}
|
||||
|
||||
int32_t test_vminvq_s32(int32x4_t a) {
|
||||
// CHECK: test_vminvq_s32
|
||||
return vminvq_s32(a);
|
||||
// CHECK: sminv {{s[0-9]+}}, {{v[0-9]+}}.4s
|
||||
}
|
||||
|
||||
uint8_t test_vminvq_u8(uint8x16_t a) {
|
||||
// CHECK: test_vminvq_u8
|
||||
return vminvq_u8(a);
|
||||
// CHECK: uminv {{b[0-9]+}}, {{v[0-9]+}}.16b
|
||||
}
|
||||
|
||||
uint16_t test_vminvq_u16(uint16x8_t a) {
|
||||
// CHECK: test_vminvq_u16
|
||||
return vminvq_u16(a);
|
||||
// CHECK: uminv {{h[0-9]+}}, {{v[0-9]+}}.8h
|
||||
}
|
||||
|
||||
uint32_t test_vminvq_u32(uint32x4_t a) {
|
||||
// CHECK: test_vminvq_u32
|
||||
return vminvq_u32(a);
|
||||
// CHECK: uminv {{s[0-9]+}}, {{v[0-9]+}}.4s
|
||||
}
|
||||
|
||||
int8_t test_vaddv_s8(int8x8_t a) {
|
||||
// CHECK: test_vaddv_s8
|
||||
return vaddv_s8(a);
|
||||
// CHECK: addv {{b[0-9]+}}, {{v[0-9]+}}.8b
|
||||
}
|
||||
|
||||
int16_t test_vaddv_s16(int16x4_t a) {
|
||||
// CHECK: test_vaddv_s16
|
||||
return vaddv_s16(a);
|
||||
// CHECK: addv {{h[0-9]+}}, {{v[0-9]+}}.4h
|
||||
}
|
||||
|
||||
uint8_t test_vaddv_u8(uint8x8_t a) {
|
||||
// CHECK: test_vaddv_u8
|
||||
return vaddv_u8(a);
|
||||
// CHECK: addv {{b[0-9]+}}, {{v[0-9]+}}.8b
|
||||
}
|
||||
|
||||
uint16_t test_vaddv_u16(uint16x4_t a) {
|
||||
// CHECK: test_vaddv_u16
|
||||
return vaddv_u16(a);
|
||||
// CHECK: addv {{h[0-9]+}}, {{v[0-9]+}}.4h
|
||||
}
|
||||
|
||||
int8_t test_vaddvq_s8(int8x16_t a) {
|
||||
// CHECK: test_vaddvq_s8
|
||||
return vaddvq_s8(a);
|
||||
// CHECK: addv {{b[0-9]+}}, {{v[0-9]+}}.16b
|
||||
}
|
||||
|
||||
int16_t test_vaddvq_s16(int16x8_t a) {
|
||||
// CHECK: test_vaddvq_s16
|
||||
return vaddvq_s16(a);
|
||||
// CHECK: addv {{h[0-9]+}}, {{v[0-9]+}}.8h
|
||||
}
|
||||
|
||||
int32_t test_vaddvq_s32(int32x4_t a) {
|
||||
// CHECK: test_vaddvq_s32
|
||||
return vaddvq_s32(a);
|
||||
// CHECK: addv {{s[0-9]+}}, {{v[0-9]+}}.4s
|
||||
}
|
||||
|
||||
uint8_t test_vaddvq_u8(uint8x16_t a) {
|
||||
// CHECK: test_vaddvq_u8
|
||||
return vaddvq_u8(a);
|
||||
// CHECK: addv {{b[0-9]+}}, {{v[0-9]+}}.16b
|
||||
}
|
||||
|
||||
uint16_t test_vaddvq_u16(uint16x8_t a) {
|
||||
// CHECK: test_vaddvq_u16
|
||||
return vaddvq_u16(a);
|
||||
// CHECK: addv {{h[0-9]+}}, {{v[0-9]+}}.8h
|
||||
}
|
||||
|
||||
uint32_t test_vaddvq_u32(uint32x4_t a) {
|
||||
// CHECK: test_vaddvq_u32
|
||||
return vaddvq_u32(a);
|
||||
// CHECK: addv {{s[0-9]+}}, {{v[0-9]+}}.4s
|
||||
}
|
||||
|
||||
float32_t test_vmaxvq_f32(float32x4_t a) {
|
||||
// CHECK: test_vmaxvq_f32
|
||||
return vmaxvq_f32(a);
|
||||
// CHECK: fmaxv {{s[0-9]+}}, {{v[0-9]+}}.4s
|
||||
}
|
||||
|
||||
float32_t test_vminvq_f32(float32x4_t a) {
|
||||
// CHECK: test_vminvq_f32
|
||||
return vminvq_f32(a);
|
||||
// CHECK: fminv {{s[0-9]+}}, {{v[0-9]+}}.4s
|
||||
}
|
||||
|
||||
float32_t test_vmaxnmvq_f32(float32x4_t a) {
|
||||
// CHECK: test_vmaxnmvq_f32
|
||||
return vmaxnmvq_f32(a);
|
||||
// CHECK: fmaxnmv {{s[0-9]+}}, {{v[0-9]+}}.4s
|
||||
}
|
||||
|
||||
float32_t test_vminnmvq_f32(float32x4_t a) {
|
||||
// CHECK: test_vminnmvq_f32
|
||||
return vminnmvq_f32(a);
|
||||
// CHECK: fminnmv {{s[0-9]+}}, {{v[0-9]+}}.4s
|
||||
}
|
||||
|
|
@ -484,6 +484,8 @@ static char ModType(const char mod, char type, bool &quad, bool &poly,
|
|||
scal = true;
|
||||
usgn = true;
|
||||
break;
|
||||
case 'r':
|
||||
type = Widen(type);
|
||||
case 's':
|
||||
case 'a':
|
||||
scal = true;
|
||||
|
|
@ -1878,6 +1880,12 @@ static unsigned GetNeonEnum(const std::string &proto, StringRef typestr) {
|
|||
return Flags.getFlags();
|
||||
}
|
||||
|
||||
static bool ProtoHasScalar(const std::string proto)
|
||||
{
|
||||
return (proto.find('s') != std::string::npos
|
||||
|| proto.find('r') != std::string::npos);
|
||||
}
|
||||
|
||||
// Generate the definition for this intrinsic, e.g. __builtin_neon_cls(a)
|
||||
static std::string GenBuiltin(const std::string &name, const std::string &proto,
|
||||
StringRef typestr, ClassKind ck) {
|
||||
|
|
@ -1892,7 +1900,7 @@ static std::string GenBuiltin(const std::string &name, const std::string &proto,
|
|||
// Check if the prototype has a scalar operand with the type of the vector
|
||||
// elements. If not, bitcasting the args will take care of arg checking.
|
||||
// The actual signedness etc. will be taken care of with special enums.
|
||||
if (proto.find('s') == std::string::npos)
|
||||
if (!ProtoHasScalar(proto))
|
||||
ck = ClassB;
|
||||
|
||||
if (proto[0] != 'v') {
|
||||
|
|
@ -2003,7 +2011,7 @@ static std::string GenBuiltinDef(const std::string &name,
|
|||
// If all types are the same size, bitcasting the args will take care
|
||||
// of arg checking. The actual signedness etc. will be taken care of with
|
||||
// special enums.
|
||||
if (proto.find('s') == std::string::npos)
|
||||
if (!ProtoHasScalar(proto))
|
||||
ck = ClassB;
|
||||
|
||||
s += MangleName(name, typestr, ck);
|
||||
|
|
@ -2413,7 +2421,7 @@ NeonEmitter::genIntrinsicRangeCheckCode(raw_ostream &OS,
|
|||
else
|
||||
PrintFatalError(R->getLoc(),
|
||||
"Fixed point convert name should contains \"32\" or \"64\"");
|
||||
} else if (Proto.find('s') == std::string::npos) {
|
||||
} else if (!ProtoHasScalar(Proto)) {
|
||||
// Builtins which are overloaded by type will need to have their upper
|
||||
// bound computed at Sema time based on the type constant.
|
||||
ck = ClassB;
|
||||
|
|
@ -2510,7 +2518,7 @@ NeonEmitter::genOverloadTypeCheckCode(raw_ostream &OS,
|
|||
|
||||
// Functions which have a scalar argument cannot be overloaded, no need to
|
||||
// check them if we are emitting the type checking code.
|
||||
if (Proto.find('s') != std::string::npos)
|
||||
if (ProtoHasScalar(Proto))
|
||||
continue;
|
||||
|
||||
SmallVector<StringRef, 16> TypeVec;
|
||||
|
|
|
|||
Loading…
Reference in New Issue