forked from OSchip/llvm-project
[AArch64]Add CHECK for two test cases testing scalar_to_vector committed in r199461.
llvm-svn: 199861
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@ -967,20 +967,33 @@ entry:
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ret <2 x i32> %vecinit1.i
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}
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define <2 x float> @test_scalar_to_vector_f32_to_v2f32(<1 x float> %a) {
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define <2 x float> @test_scalar_to_vector_f32_to_v2f32(<2 x float> %a) {
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; CHECK-LABEL: test_scalar_to_vector_f32_to_v2f32:
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; CHECK: fmaxp s{{[0-9]+}}, v{{[0-9]+}}.2s
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; CHECK-NEXT: ret
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entry:
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%0 = extractelement <1 x float> %a, i32 0
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%vecinit1.i = insertelement <2 x float> undef, float %0, i32 0
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%0 = call float @llvm.aarch64.neon.vpmax.f32.v2f32(<2 x float> %a)
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%1 = insertelement <1 x float> undef, float %0, i32 0
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%2 = extractelement <1 x float> %1, i32 0
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%vecinit1.i = insertelement <2 x float> undef, float %2, i32 0
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ret <2 x float> %vecinit1.i
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}
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define <4 x float> @test_scalar_to_vector_f32_to_v4f32(<1 x float> %a) {
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define <4 x float> @test_scalar_to_vector_f32_to_v4f32(<2 x float> %a) {
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; CHECK-LABEL: test_scalar_to_vector_f32_to_v4f32:
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; CHECK: fmaxp s{{[0-9]+}}, v{{[0-9]+}}.2s
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; CHECK-NEXT: ret
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entry:
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%0 = extractelement <1 x float> %a, i32 0
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%vecinit1.i = insertelement <4 x float> undef, float %0, i32 0
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%0 = call float @llvm.aarch64.neon.vpmax.f32.v2f32(<2 x float> %a)
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%1 = insertelement <1 x float> undef, float %0, i32 0
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%2 = extractelement <1 x float> %1, i32 0
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%vecinit1.i = insertelement <4 x float> undef, float %2, i32 0
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ret <4 x float> %vecinit1.i
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}
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declare float @llvm.aarch64.neon.vpmax.f32.v2f32(<2 x float>)
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define <16 x i8> @test_concat_v16i8_v16i8_v16i8(<16 x i8> %x, <16 x i8> %y) #0 {
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; CHECK-LABEL: test_concat_v16i8_v16i8_v16i8:
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; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
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