forked from OSchip/llvm-project
Dependences: Bound the time dependence calculation is allowed to take
Count the number of computational steps that have been used to solve the dependence problem and abort in case we reach the "compute-out". This ensures we do not hang forever in cases the dependence problem is too difficult to solve. There is just a single case in the LLVM test-suite that runs into the compute-out. Even in this case, we can probably coalesce some of the parameters (i32 b, i32 b zext i64, ...) to simplify the problem enough to not hit the compute out. However, for now we set the compute out in place to address the general issue. The compute out was choosen such that it stops on a recent laptop after about 8 seconds. llvm-svn: 200156
This commit is contained in:
Tobias Grosser
parent
a38c92406c
commit
b917f47fc4
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@ -26,8 +26,10 @@
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#include "polly/ScopInfo.h"
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#include "polly/Support/GICHelper.h"
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#include <isl/aff.h>
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#include <isl/ctx.h>
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#include <isl/flow.h>
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#include <isl/map.h>
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#include <isl/options.h>
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#include <isl/set.h>
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#define DEBUG_TYPE "polly-dependence"
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@ -36,6 +38,12 @@
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using namespace polly;
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using namespace llvm;
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static cl::opt<int>
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OptComputeOut("polly-dependences-computeout",
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cl::desc("Bound the dependence analysis by a maximal amount of "
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"computational steps"),
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cl::Hidden, cl::init(100000), cl::cat(PollyCategory));
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static cl::opt<bool>
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LegalityCheckDisabled("disable-polly-legality",
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cl::desc("Disable polly legality check"), cl::Hidden,
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@ -96,11 +104,17 @@ void Dependences::calculateDependences(Scop &S) {
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Write = isl_union_map_coalesce(Write);
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MayWrite = isl_union_map_coalesce(MayWrite);
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long MaxOpsOld = isl_ctx_get_max_operations(S.getIslCtx());
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isl_ctx_set_max_operations(S.getIslCtx(), OptComputeOut);
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isl_options_set_on_error(S.getIslCtx(), ISL_ON_ERROR_CONTINUE);
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DEBUG(dbgs() << "Read: " << Read << "\n";
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dbgs() << "Write: " << Write << "\n";
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dbgs() << "MayWrite: " << MayWrite << "\n";
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dbgs() << "Schedule: " << Schedule << "\n");
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WAW = WAW = WAR;
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if (OptAnalysisType == VALUE_BASED_ANALYSIS) {
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isl_union_map_compute_flow(
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isl_union_map_copy(Read), isl_union_map_copy(Write),
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@ -143,6 +157,17 @@ void Dependences::calculateDependences(Scop &S) {
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WAW = isl_union_map_coalesce(WAW);
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WAR = isl_union_map_coalesce(WAR);
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if (isl_ctx_last_error(S.getIslCtx()) == isl_error_quota) {
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isl_union_map_free(RAW);
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isl_union_map_free(WAW);
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isl_union_map_free(WAR);
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RAW = WAW = WAR = NULL;
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isl_ctx_reset_error(S.getIslCtx());
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}
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isl_options_set_on_error(S.getIslCtx(), ISL_ON_ERROR_ABORT);
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isl_ctx_reset_operations(S.getIslCtx());
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isl_ctx_set_max_operations(S.getIslCtx(), MaxOpsOld);
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DEBUG(printScop(dbgs()));
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}
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@ -262,9 +287,23 @@ bool Dependences::isParallelDimension(__isl_take isl_set *ScheduleSubset,
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}
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void Dependences::printScop(raw_ostream &OS) const {
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OS << "\tRAW dependences:\n\t\t" << RAW << "\n";
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OS << "\tWAR dependences:\n\t\t" << WAR << "\n";
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OS << "\tWAW dependences:\n\t\t" << WAW << "\n";
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OS << "\tRAW dependences:\n\t\t";
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if (RAW)
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OS << RAW << "\n";
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else
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OS << "n/a\n";
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OS << "\tWAR dependences:\n\t\t";
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if (WAR)
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OS << WAR << "\n";
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else
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OS << "n/a\n";
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OS << "\tWAW dependences:\n\t\t";
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if (WAW)
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OS << WAW << "\n";
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else
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OS << "n/a\n";
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}
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void Dependences::releaseMemory() {
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@ -0,0 +1,72 @@
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; RUN: opt -S %loadPolly -basicaa -polly-dependences -analyze < %s | FileCheck %s -check-prefix=VALUE
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; RUN: opt -S %loadPolly -basicaa -polly-dependences -analyze -polly-dependences-computeout=1 < %s | FileCheck %s -check-prefix=TIMEOUT
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-pc-linux-gnu"
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; for(i = 0; i < 100; i++ )
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; S1: A[i] = 2;
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;
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; for (i = 0; i < 10; i++ )
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; S2: A[i] = 5;
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;
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; for (i = 0; i < 200; i++ )
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; S3: A[i] = 5;
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define void @sequential_writes() {
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entry:
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%A = alloca [200 x i32]
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br label %S1
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S1:
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%indvar.1 = phi i64 [ 0, %entry ], [ %indvar.next.1, %S1 ]
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%arrayidx.1 = getelementptr [200 x i32]* %A, i64 0, i64 %indvar.1
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store i32 2, i32* %arrayidx.1
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%indvar.next.1 = add i64 %indvar.1, 1
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%exitcond.1 = icmp ne i64 %indvar.next.1, 100
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br i1 %exitcond.1, label %S1, label %exit.1
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exit.1:
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br label %S2
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S2:
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%indvar.2 = phi i64 [ 0, %exit.1 ], [ %indvar.next.2, %S2 ]
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%arrayidx.2 = getelementptr [200 x i32]* %A, i64 0, i64 %indvar.2
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store i32 5, i32* %arrayidx.2
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%indvar.next.2 = add i64 %indvar.2, 1
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%exitcond.2 = icmp ne i64 %indvar.next.2, 10
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br i1 %exitcond.2, label %S2, label %exit.2
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exit.2:
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br label %S3
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S3:
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%indvar.3 = phi i64 [ 0, %exit.2 ], [ %indvar.next.3, %S3 ]
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%arrayidx.3 = getelementptr [200 x i32]* %A, i64 0, i64 %indvar.3
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store i32 7, i32* %arrayidx.3
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%indvar.next.3 = add i64 %indvar.3, 1
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%exitcond.3 = icmp ne i64 %indvar.next.3, 200
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br i1 %exitcond.3, label %S3 , label %exit.3
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exit.3:
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ret void
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}
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; VALUE: region: 'S1 => exit.3' in function 'sequential_writes':
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; VALUE: RAW dependences:
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; VALUE: { }
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; VALUE: WAR dependences:
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; VALUE: { }
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; VALUE: WAW dependences:
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; VALUE: {
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; VALUE: Stmt_S1[i0] -> Stmt_S2[i0] : i0 >= 0 and i0 <= 9;
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; VALUE: Stmt_S2[i0] -> Stmt_S3[i0] : i0 >= 0 and i0 <= 9;
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; VALUE: Stmt_S1[i0] -> Stmt_S3[i0] : i0 >= 10 and i0 <= 99
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; VALUE: }
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; TIMEOUT: region: 'S1 => exit.3' in function 'sequential_writes':
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; TIMEOUT: RAW dependences:
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; TIMEOUT: n/a
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; TIMEOUT: WAR dependences:
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; TIMEOUT: n/a
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; TIMEOUT: WAW dependences:
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; TIMEOUT: n/a
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