forked from OSchip/llvm-project
parent
03524c63ff
commit
b90055ef24
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@ -377,8 +377,8 @@ void AlphaDAGToDAGISel::Select(SDOperand &Result, SDOperand Op) {
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break;
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case ISD::AND: {
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ConstantSDNode* SC;
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ConstantSDNode* MC;
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ConstantSDNode* SC = NULL;
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ConstantSDNode* MC = NULL;
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if (N->getOperand(0).getOpcode() == ISD::SRL &&
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(MC = dyn_cast<ConstantSDNode>(N->getOperand(1))) &&
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(SC = dyn_cast<ConstantSDNode>(N->getOperand(0).getOperand(1))))
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