forked from OSchip/llvm-project
[Object][RISCV] Fix R_RISCV_SET6 and R_RISCV_SUB6 relocations resolution
Summary: These relocations had a suspicious resolution logic, given their name. This patch makes the resolution match the LLD one, which makes more sense. Reviewers: asb, lenary, HsiangKai, jrtc27 Reviewed By: HsiangKai Tags: #llvm Differential Revision: https://reviews.llvm.org/D70396
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@ -363,9 +363,9 @@ static uint64_t resolveRISCV(RelocationRef R, uint64_t S, uint64_t A) {
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case ELF::R_RISCV_64:
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return S + RA;
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case ELF::R_RISCV_SET6:
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return (A + (S + RA)) & 0xFF;
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return (A & 0xC0) | ((S + RA) & 0x3F);
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case ELF::R_RISCV_SUB6:
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return (A - (S + RA)) & 0xFF;
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return (A & 0xC0) | (((A & 0x3F) - (S + RA)) & 0x3F);
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case ELF::R_RISCV_ADD8:
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return (A + (S + RA)) & 0xFF;
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case ELF::R_RISCV_SUB8:
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