forked from OSchip/llvm-project
[X86][AVX] Remove REX_W from AVX instructions.
There is no meaning for REX_W in VEX encoded AVX instruction. Differential Revision: https://reviews.llvm.org/D29894 llvm-svn: 295157
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@ -6071,20 +6071,20 @@ multiclass SS41I_extract64<bits<8> opc, string OpcodeStr> {
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"\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
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[(set GR64:$dst,
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(extractelt (v2i64 VR128:$src1), imm:$src2))]>,
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Sched<[WriteShuffle]>, REX_W;
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Sched<[WriteShuffle]>;
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let SchedRW = [WriteShuffleLd, WriteRMW] in
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def mr : SS4AIi8<opc, MRMDestMem, (outs),
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(ins i64mem:$dst, VR128:$src1, u8imm:$src2),
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!strconcat(OpcodeStr,
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"\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
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[(store (extractelt (v2i64 VR128:$src1), imm:$src2),
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addr:$dst)]>, REX_W;
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addr:$dst)]>;
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}
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let Predicates = [HasAVX, NoDQI] in
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defm VPEXTRQ : SS41I_extract64<0x16, "vpextrq">, VEX, VEX_W;
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defm PEXTRQ : SS41I_extract64<0x16, "pextrq">;
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defm PEXTRQ : SS41I_extract64<0x16, "pextrq">, REX_W;
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/// SS41I_extractf32 - SSE 4.1 extract 32 bits fp value to int reg or memory
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/// destination
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