From b898b86f49b528e31318794596ad6a232cc3470d Mon Sep 17 00:00:00 2001
From: Chandler Carruth <chandlerc@gmail.com>
Date: Fri, 17 Aug 2018 04:47:16 +0000
Subject: [PATCH] Revert r339977: [GISel]: Add Opcodes for a few LLVM
 Intrinsics

This is breaking ~all the bots.

llvm-svn: 339982
---
 llvm/include/llvm/Support/TargetOpcodes.def   |  6 ------
 llvm/include/llvm/Target/GenericOpcodes.td    | 15 --------------
 llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp  | 10 ----------
 .../AArch64/GlobalISel/arm64-irtranslator.ll  | 20 -------------------
 4 files changed, 51 deletions(-)

diff --git a/llvm/include/llvm/Support/TargetOpcodes.def b/llvm/include/llvm/Support/TargetOpcodes.def
index dfd15ac22d95..9143e5b9dd9f 100644
--- a/llvm/include/llvm/Support/TargetOpcodes.def
+++ b/llvm/include/llvm/Support/TargetOpcodes.def
@@ -268,12 +268,6 @@ HANDLE_TARGET_OPCODE(G_INTTOPTR)
 /// COPY is the relevant instruction.
 HANDLE_TARGET_OPCODE(G_BITCAST)
 
-/// INTRINSIC trunc intrinsic.
-HANDLE_TARGET_OPCODE(G_INTRINSIC_TRUNC)
-
-/// INTRINSIC round intrinsic.
-HANDLE_TARGET_OPCODE(G_INTRINSIC_ROUND)
-
 /// Generic load (including anyext load)
 HANDLE_TARGET_OPCODE(G_LOAD)
 
diff --git a/llvm/include/llvm/Target/GenericOpcodes.td b/llvm/include/llvm/Target/GenericOpcodes.td
index 2a2bef2fb386..90c121dfe3a4 100644
--- a/llvm/include/llvm/Target/GenericOpcodes.td
+++ b/llvm/include/llvm/Target/GenericOpcodes.td
@@ -512,21 +512,6 @@ def G_FLOG2 : GenericInstruction {
   let hasSideEffects = 0;
 }
 
-//------------------------------------------------------------------------------
-// Opcodes for LLVM Intrinsics
-//------------------------------------------------------------------------------
-def G_INTRINSIC_TRUNC : GenericInstruction {
-  let OutOperandList = (outs type0:$dst);
-  let InOperandList = (ins type0:$src1);
-  let hasSideEffects = 0;
-}
-
-def G_INTRINSIC_ROUND : GenericInstruction {
-  let OutOperandList = (outs type0:$dst);
-  let InOperandList = (ins type0:$src1);
-  let hasSideEffects = 0;
-}
-
 //------------------------------------------------------------------------------
 // Memory ops
 //------------------------------------------------------------------------------
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index 3fda5cb90072..74f51cc72927 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -850,16 +850,6 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
         .addDef(getOrCreateVReg(CI))
         .addUse(getOrCreateVReg(*CI.getArgOperand(0)));
     return true;
-  case Intrinsic::trunc:
-    MIRBuilder.buildInstr(TargetOpcode::G_INTRINSIC_TRUNC)
-        .addDef(getOrCreateVReg(CI))
-        .addUse(getOrCreateVReg(*CI.getArgOperand(0)));
-    return true;
-  case Intrinsic::round:
-    MIRBuilder.buildInstr(TargetOpcode::G_INTRINSIC_ROUND)
-        .addDef(getOrCreateVReg(CI))
-        .addUse(getOrCreateVReg(*CI.getArgOperand(0)));
-    return true;
   case Intrinsic::fma:
     MIRBuilder.buildInstr(TargetOpcode::G_FMA)
         .addDef(getOrCreateVReg(CI))
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
index cf30558d5d63..75615e9d6c12 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
@@ -1408,26 +1408,6 @@ define float @test_fabs_intrin(float %a) {
   ret float %res
 }
 
-declare float @llvm.trunc.f32(float)
-define float @test_intrinsic_trunc(float %a) {
-; CHECK-LABEL: name: test_intrinsic_trunc
-; CHECK: [[A:%[0-9]+]]:_(s32) = COPY $s0
-; CHECK: [[RES:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[A]]
-; CHECK: $s0 = COPY [[RES]]
-  %res = call float @llvm.trunc.f32(float %a)
-  ret float %res
-}
-
-declare float @llvm.round.f32(float)
-define float @test_intrinsic_round(float %a) {
-; CHECK-LABEL: name: test_intrinsic_round
-; CHECK: [[A:%[0-9]+]]:_(s32) = COPY $s0
-; CHECK: [[RES:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[A]]
-; CHECK: $s0 = COPY [[RES]]
-  %res = call float @llvm.round.f32(float %a)
-  ret float %res
-}
-
 declare i32 @llvm.ctlz.i32(i32, i1)
 define i32 @test_ctlz_intrinsic_zero_not_undef(i32 %a) {
 ; CHECK-LABEL: name: test_ctlz_intrinsic_zero_not_undef