forked from OSchip/llvm-project
Merge vpermps/vpermd and vpermpd/vpermq SD nodes.
llvm-svn: 154782
This commit is contained in:
parent
b04fe34030
commit
b86fa404d3
|
@ -2935,8 +2935,7 @@ static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT,
|
|||
case X86ISD::PSHUFHW:
|
||||
case X86ISD::PSHUFLW:
|
||||
case X86ISD::VPERMILP:
|
||||
case X86ISD::VPERMQ:
|
||||
case X86ISD::VPERMPD:
|
||||
case X86ISD::VPERMI:
|
||||
return DAG.getNode(Opc, dl, VT, V1, DAG.getConstant(TargetMask, MVT::i8));
|
||||
}
|
||||
}
|
||||
|
@ -6656,16 +6655,14 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
|
|||
for (unsigned i = 0; i != 8; ++i) {
|
||||
permclMask.push_back(DAG.getConstant((M[i]>=0) ? M[i] : 0, MVT::i32));
|
||||
}
|
||||
return DAG.getNode(VT.isInteger()? X86ISD::VPERMD:X86ISD::VPERMPS, dl, VT,
|
||||
return DAG.getNode(X86ISD::VPERMV, dl, VT,
|
||||
DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v8i32,
|
||||
&permclMask[0], 8), V1);
|
||||
}
|
||||
|
||||
if (V2IsUndef && HasAVX2 && (VT == MVT::v4i64 || VT == MVT::v4f64)) {
|
||||
unsigned Opcode = VT.isInteger() ? X86ISD::VPERMQ : X86ISD::VPERMPD;
|
||||
return getTargetShuffleNode(Opcode, dl, VT, V1,
|
||||
if (V2IsUndef && HasAVX2 && (VT == MVT::v4i64 || VT == MVT::v4f64))
|
||||
return getTargetShuffleNode(X86ISD::VPERMI, dl, VT, V1,
|
||||
getShuffleCLImmediate(SVOp), DAG);
|
||||
}
|
||||
|
||||
|
||||
//===--------------------------------------------------------------------===//
|
||||
|
@ -11181,10 +11178,8 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
|
|||
case X86ISD::VBROADCAST: return "X86ISD::VBROADCAST";
|
||||
case X86ISD::VPERMILP: return "X86ISD::VPERMILP";
|
||||
case X86ISD::VPERM2X128: return "X86ISD::VPERM2X128";
|
||||
case X86ISD::VPERMD: return "X86ISD::VPERMD";
|
||||
case X86ISD::VPERMQ: return "X86ISD::VPERMQ";
|
||||
case X86ISD::VPERMPS: return "X86ISD::VPERMPS";
|
||||
case X86ISD::VPERMPD: return "X86ISD::VPERMPD";
|
||||
case X86ISD::VPERMV: return "X86ISD::VPERMV";
|
||||
case X86ISD::VPERMI: return "X86ISD::VPERMI";
|
||||
case X86ISD::PMULUDQ: return "X86ISD::PMULUDQ";
|
||||
case X86ISD::VASTART_SAVE_XMM_REGS: return "X86ISD::VASTART_SAVE_XMM_REGS";
|
||||
case X86ISD::VAARG_64: return "X86ISD::VAARG_64";
|
||||
|
|
|
@ -285,10 +285,8 @@ namespace llvm {
|
|||
UNPCKL,
|
||||
UNPCKH,
|
||||
VPERMILP,
|
||||
VPERMD,
|
||||
VPERMQ,
|
||||
VPERMPS,
|
||||
VPERMPD,
|
||||
VPERMV,
|
||||
VPERMI,
|
||||
VPERM2X128,
|
||||
VBROADCAST,
|
||||
|
||||
|
|
|
@ -157,10 +157,8 @@ def X86Unpckl : SDNode<"X86ISD::UNPCKL", SDTShuff2Op>;
|
|||
def X86Unpckh : SDNode<"X86ISD::UNPCKH", SDTShuff2Op>;
|
||||
|
||||
def X86VPermilp : SDNode<"X86ISD::VPERMILP", SDTShuff2OpI>;
|
||||
def X86VPermd : SDNode<"X86ISD::VPERMD", SDTVPermv>;
|
||||
def X86VPermps : SDNode<"X86ISD::VPERMPS", SDTVPermv>;
|
||||
def X86VPermq : SDNode<"X86ISD::VPERMQ", SDTShuff2OpI>;
|
||||
def X86VPermpd : SDNode<"X86ISD::VPERMPD", SDTShuff2OpI>;
|
||||
def X86VPermv : SDNode<"X86ISD::VPERMV", SDTVPermv>;
|
||||
def X86VPermi : SDNode<"X86ISD::VPERMI", SDTShuff2OpI>;
|
||||
|
||||
def X86VPerm2x128 : SDNode<"X86ISD::VPERM2X128", SDTShuff3OpI>;
|
||||
|
||||
|
|
|
@ -7755,37 +7755,35 @@ let ExeDomain = SSEPackedSingle in
|
|||
defm VPERMPS : avx2_perm<0x16, "vpermps", memopv8f32, int_x86_avx2_permps>;
|
||||
|
||||
multiclass avx2_perm_imm<bits<8> opc, string OpcodeStr, PatFrag mem_frag,
|
||||
SDNode OpNode, ValueType OpVT> {
|
||||
ValueType OpVT> {
|
||||
def Yri : AVX2AIi8<opc, MRMSrcReg, (outs VR256:$dst),
|
||||
(ins VR256:$src1, i8imm:$src2),
|
||||
!strconcat(OpcodeStr,
|
||||
"\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
|
||||
[(set VR256:$dst,
|
||||
(OpVT (OpNode VR256:$src1, (i8 imm:$src2))))]>, VEX;
|
||||
(OpVT (X86VPermi VR256:$src1, (i8 imm:$src2))))]>, VEX;
|
||||
def Ymi : AVX2AIi8<opc, MRMSrcMem, (outs VR256:$dst),
|
||||
(ins i256mem:$src1, i8imm:$src2),
|
||||
!strconcat(OpcodeStr,
|
||||
"\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
|
||||
[(set VR256:$dst,
|
||||
(OpVT (OpNode (mem_frag addr:$src1), (i8 imm:$src2))))]>,
|
||||
VEX;
|
||||
(OpVT (X86VPermi (mem_frag addr:$src1),
|
||||
(i8 imm:$src2))))]>, VEX;
|
||||
}
|
||||
|
||||
defm VPERMQ : avx2_perm_imm<0x00, "vpermq", memopv4i64, X86VPermq, v4i64>,
|
||||
VEX_W;
|
||||
defm VPERMQ : avx2_perm_imm<0x00, "vpermq", memopv4i64, v4i64>, VEX_W;
|
||||
let ExeDomain = SSEPackedDouble in
|
||||
defm VPERMPD : avx2_perm_imm<0x01, "vpermpd", memopv4f64, X86VPermpd, v4f64>,
|
||||
VEX_W;
|
||||
defm VPERMPD : avx2_perm_imm<0x01, "vpermpd", memopv4f64, v4f64>, VEX_W;
|
||||
|
||||
let Predicates = [HasAVX2] in {
|
||||
def : Pat<(v8i32 (X86VPermd VR256:$src1, VR256:$src2)),
|
||||
def : Pat<(v8i32 (X86VPermv VR256:$src1, VR256:$src2)),
|
||||
(VPERMDYrr VR256:$src1, VR256:$src2)>;
|
||||
def : Pat<(v8f32 (X86VPermps VR256:$src1, VR256:$src2)),
|
||||
def : Pat<(v8f32 (X86VPermv VR256:$src1, VR256:$src2)),
|
||||
(VPERMPSYrr VR256:$src1, VR256:$src2)>;
|
||||
|
||||
def : Pat<(v8i32 (X86VPermd VR256:$src1, (bc_v8i32 (memopv4i64 addr:$src2)))),
|
||||
def : Pat<(v8i32 (X86VPermv VR256:$src1, (bc_v8i32 (memopv4i64 addr:$src2)))),
|
||||
(VPERMDYrm VR256:$src1, addr:$src2)>;
|
||||
def : Pat<(v8f32 (X86VPermps VR256:$src1, (memopv8f32 addr:$src2))),
|
||||
def : Pat<(v8f32 (X86VPermv VR256:$src1, (memopv8f32 addr:$src2))),
|
||||
(VPERMPSYrm VR256:$src1, addr:$src2)>;
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in New Issue