forked from OSchip/llvm-project
Add support for patterns that have physical registers in them. Testcase:
def : Pat<(trunc G8RC:$in), (OR8To4 G8RC:$in, X0)>; Even though this doesn't make any sense on PPC :) llvm-svn: 23815
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@ -1617,6 +1617,18 @@ CodeGenPatternResult(TreePatternNode *N, unsigned &Ctr,
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}
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}
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if (N->isLeaf()) {
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if (N->isLeaf()) {
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// If this is an explicit register reference, handle it.
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if (DefInit *DI = dynamic_cast<DefInit*>(N->getLeafValue())) {
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unsigned ResNo = Ctr++;
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if (DI->getDef()->isSubClassOf("Register")) {
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OS << " SDOperand Tmp" << ResNo << " = CurDAG->getRegister("
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<< getQualifiedName(DI->getDef()) << ", MVT::"
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<< getEnumName(N->getType())
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<< ");\n";
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return ResNo;
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}
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}
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N->dump();
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N->dump();
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assert(0 && "Unknown leaf type!");
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assert(0 && "Unknown leaf type!");
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return ~0U;
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return ~0U;
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