forked from OSchip/llvm-project
pull a nested loop of this pass out to its own function,
eliminating the gymnastics around the ContainsFPCode var. llvm-svn: 104328
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c5871f07f0
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@ -53,6 +53,52 @@ FunctionPass *llvm::createX87FPRegKillInserterPass() {
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return new FPRegKiller();
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}
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/// ContainsFPStackCode - Return true if the specific MBB has floating point
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/// stack code, and thus needs an FP_REG_KILL.
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static bool ContainsFPStackCode(MachineBasicBlock *MBB, unsigned SSELevel,
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MachineRegisterInfo &MRI) {
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for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
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I != E; ++I) {
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if (I->getNumOperands() != 0 && I->getOperand(0).isReg()) {
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for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
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if (I->getOperand(op).isReg() && I->getOperand(op).isDef() &&
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TargetRegisterInfo::isVirtualRegister(I->getOperand(op).getReg())) {
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const TargetRegisterClass *RegClass =
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MRI.getRegClass(I->getOperand(op).getReg());
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if (RegClass == X86::RFP32RegisterClass ||
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RegClass == X86::RFP64RegisterClass ||
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RegClass == X86::RFP80RegisterClass)
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return true;
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}
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}
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}
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}
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// Check PHI nodes in successor blocks. These PHI's will be lowered to have
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// a copy of the input value in this block. In SSE mode, we only care about
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// 80-bit values.
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// Final check, check LLVM BB's that are successors to the LLVM BB
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// corresponding to BB for FP PHI nodes.
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const BasicBlock *LLVMBB = MBB->getBasicBlock();
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for (succ_const_iterator SI = succ_begin(LLVMBB), E = succ_end(LLVMBB);
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SI != E; ++SI) {
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const PHINode *PN;
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for (BasicBlock::const_iterator II = SI->begin();
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(PN = dyn_cast<PHINode>(II)); ++II) {
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if (PN->getType()->isX86_FP80Ty() ||
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(SSELevel == 0 && PN->getType()->isFloatingPointTy()) ||
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(SSELevel < 2 && PN->getType()->isDoubleTy())) {
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return true;
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}
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}
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}
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return false;
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}
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bool FPRegKiller::runOnMachineFunction(MachineFunction &MF) {
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// If we are emitting FP stack code, scan the basic block to determine if this
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// block defines any FP values. If so, put an FP_REG_KILL instruction before
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@ -75,8 +121,14 @@ bool FPRegKiller::runOnMachineFunction(MachineFunction &MF) {
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MRI.getRegClassVirtRegs(X86::RFP32RegisterClass).empty())
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return false;
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bool Changed = false;
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const X86Subtarget &Subtarget = MF.getTarget().getSubtarget<X86Subtarget>();
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unsigned SSELevel = 0;
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if (Subtarget.hasSSE2())
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SSELevel = 2;
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else if (Subtarget.hasSSE1())
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SSELevel = 1;
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bool Changed = false;
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MachineFunction::iterator MBBI = MF.begin();
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MachineFunction::iterator EndMBB = MF.end();
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for (; MBBI != EndMBB; ++MBBI) {
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@ -91,47 +143,8 @@ bool FPRegKiller::runOnMachineFunction(MachineFunction &MF) {
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continue;
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}
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bool ContainsFPCode = false;
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for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
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!ContainsFPCode && I != E; ++I) {
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if (I->getNumOperands() != 0 && I->getOperand(0).isReg()) {
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const TargetRegisterClass *clas;
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for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
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if (I->getOperand(op).isReg() && I->getOperand(op).isDef() &&
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TargetRegisterInfo::isVirtualRegister(I->getOperand(op).getReg()) &&
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((clas = MRI.getRegClass(I->getOperand(op).getReg())) ==
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X86::RFP32RegisterClass ||
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clas == X86::RFP64RegisterClass ||
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clas == X86::RFP80RegisterClass)) {
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ContainsFPCode = true;
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break;
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}
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}
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}
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}
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// Check PHI nodes in successor blocks. These PHI's will be lowered to have
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// a copy of the input value in this block. In SSE mode, we only care about
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// 80-bit values.
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if (!ContainsFPCode) {
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// Final check, check LLVM BB's that are successors to the LLVM BB
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// corresponding to BB for FP PHI nodes.
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const BasicBlock *LLVMBB = MBB->getBasicBlock();
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for (succ_const_iterator SI = succ_begin(LLVMBB), E = succ_end(LLVMBB);
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!ContainsFPCode && SI != E; ++SI) {
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const PHINode *PN;
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for (BasicBlock::const_iterator II = SI->begin();
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(PN = dyn_cast<PHINode>(II)); ++II) {
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if (PN->getType()->isX86_FP80Ty() ||
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(!Subtarget.hasSSE1() && PN->getType()->isFloatingPointTy()) ||
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(!Subtarget.hasSSE2() && PN->getType()->isDoubleTy())) {
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ContainsFPCode = true;
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break;
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}
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}
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}
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}
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// Finally, if we found any FP code, emit the FP_REG_KILL instruction.
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if (ContainsFPCode) {
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// If we find any FP stack code, emit the FP_REG_KILL instruction.
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if (ContainsFPStackCode(MBB, SSELevel, MRI)) {
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BuildMI(*MBB, MBBI->getFirstTerminator(), DebugLoc(),
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MF.getTarget().getInstrInfo()->get(X86::FP_REG_KILL));
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++NumFPKill;
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