forked from OSchip/llvm-project
[WebAssembly] Implement prototype SIMD rounding instructions
Summary: As specified in https://github.com/WebAssembly/simd/pull/232. These instructions are implemented as LLVM intrinsics for now rather than normal ISel patterns to make these instructions opt-in. Once the instructions are merged to the spec proposal, the intrinsics will be replaced with proper ISel patterns. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D81222
This commit is contained in:
Thomas Lively
parent
9c2e770034
commit
b7d369280b
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@ -146,6 +146,15 @@ TARGET_BUILTIN(__builtin_wasm_max_f64x2, "V2dV2dV2d", "nc", "simd128")
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TARGET_BUILTIN(__builtin_wasm_pmin_f64x2, "V2dV2dV2d", "nc", "simd128")
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TARGET_BUILTIN(__builtin_wasm_pmax_f64x2, "V2dV2dV2d", "nc", "simd128")
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TARGET_BUILTIN(__builtin_wasm_ceil_f32x4, "V4fV4f", "nc", "simd128")
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TARGET_BUILTIN(__builtin_wasm_floor_f32x4, "V4fV4f", "nc", "simd128")
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TARGET_BUILTIN(__builtin_wasm_trunc_f32x4, "V4fV4f", "nc", "simd128")
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TARGET_BUILTIN(__builtin_wasm_nearest_f32x4, "V4fV4f", "nc", "simd128")
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TARGET_BUILTIN(__builtin_wasm_ceil_f64x2, "V2dV2d", "nc", "simd128")
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TARGET_BUILTIN(__builtin_wasm_floor_f64x2, "V2dV2d", "nc", "simd128")
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TARGET_BUILTIN(__builtin_wasm_trunc_f64x2, "V2dV2d", "nc", "simd128")
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TARGET_BUILTIN(__builtin_wasm_nearest_f64x2, "V2dV2d", "nc", "simd128")
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TARGET_BUILTIN(__builtin_wasm_dot_s_i32x4_i16x8, "V4iV8sV8s", "nc", "simd128")
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TARGET_BUILTIN(__builtin_wasm_sqrt_f32x4, "V4fV4f", "nc", "simd128")
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@ -15951,6 +15951,39 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
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CGM.getIntrinsic(Intrinsic::wasm_pmax, ConvertType(E->getType()));
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return Builder.CreateCall(Callee, {LHS, RHS});
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}
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case WebAssembly::BI__builtin_wasm_ceil_f32x4:
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case WebAssembly::BI__builtin_wasm_floor_f32x4:
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case WebAssembly::BI__builtin_wasm_trunc_f32x4:
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case WebAssembly::BI__builtin_wasm_nearest_f32x4:
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case WebAssembly::BI__builtin_wasm_ceil_f64x2:
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case WebAssembly::BI__builtin_wasm_floor_f64x2:
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case WebAssembly::BI__builtin_wasm_trunc_f64x2:
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case WebAssembly::BI__builtin_wasm_nearest_f64x2: {
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unsigned IntNo;
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switch (BuiltinID) {
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case WebAssembly::BI__builtin_wasm_ceil_f32x4:
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case WebAssembly::BI__builtin_wasm_ceil_f64x2:
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IntNo = Intrinsic::wasm_ceil;
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break;
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case WebAssembly::BI__builtin_wasm_floor_f32x4:
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case WebAssembly::BI__builtin_wasm_floor_f64x2:
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IntNo = Intrinsic::wasm_floor;
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break;
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case WebAssembly::BI__builtin_wasm_trunc_f32x4:
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case WebAssembly::BI__builtin_wasm_trunc_f64x2:
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IntNo = Intrinsic::wasm_trunc;
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break;
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case WebAssembly::BI__builtin_wasm_nearest_f32x4:
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case WebAssembly::BI__builtin_wasm_nearest_f64x2:
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IntNo = Intrinsic::wasm_nearest;
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break;
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default:
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llvm_unreachable("unexpected builtin ID");
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}
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Value *Value = EmitScalarExpr(E->getArg(0));
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Function *Callee = CGM.getIntrinsic(IntNo, ConvertType(E->getType()));
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return Builder.CreateCall(Callee, Value);
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}
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case WebAssembly::BI__builtin_wasm_swizzle_v8x16: {
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Value *Src = EmitScalarExpr(E->getArg(0));
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Value *Indices = EmitScalarExpr(E->getArg(1));
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@ -621,6 +621,54 @@ f64x2 pmax_f64x2(f64x2 x, f64x2 y) {
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// WEBASSEMBLY-NEXT: ret
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}
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f32x4 ceil_f32x4(f32x4 x) {
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return __builtin_wasm_ceil_f32x4(x);
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// WEBASSEMBLY: call <4 x float> @llvm.wasm.ceil.v4f32(<4 x float> %x)
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// WEBASSEMBLY: ret
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}
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f32x4 floor_f32x4(f32x4 x) {
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return __builtin_wasm_floor_f32x4(x);
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// WEBASSEMBLY: call <4 x float> @llvm.wasm.floor.v4f32(<4 x float> %x)
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// WEBASSEMBLY: ret
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}
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f32x4 trunc_f32x4(f32x4 x) {
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return __builtin_wasm_trunc_f32x4(x);
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// WEBASSEMBLY: call <4 x float> @llvm.wasm.trunc.v4f32(<4 x float> %x)
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// WEBASSEMBLY: ret
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}
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f32x4 nearest_f32x4(f32x4 x) {
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return __builtin_wasm_nearest_f32x4(x);
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// WEBASSEMBLY: call <4 x float> @llvm.wasm.nearest.v4f32(<4 x float> %x)
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// WEBASSEMBLY: ret
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}
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f64x2 ceil_f64x2(f64x2 x) {
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return __builtin_wasm_ceil_f64x2(x);
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// WEBASSEMBLY: call <2 x double> @llvm.wasm.ceil.v2f64(<2 x double> %x)
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// WEBASSEMBLY: ret
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}
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f64x2 floor_f64x2(f64x2 x) {
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return __builtin_wasm_floor_f64x2(x);
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// WEBASSEMBLY: call <2 x double> @llvm.wasm.floor.v2f64(<2 x double> %x)
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// WEBASSEMBLY: ret
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}
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f64x2 trunc_f64x2(f64x2 x) {
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return __builtin_wasm_trunc_f64x2(x);
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// WEBASSEMBLY: call <2 x double> @llvm.wasm.trunc.v2f64(<2 x double> %x)
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// WEBASSEMBLY: ret
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}
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f64x2 nearest_f64x2(f64x2 x) {
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return __builtin_wasm_nearest_f64x2(x);
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// WEBASSEMBLY: call <2 x double> @llvm.wasm.nearest.v2f64(<2 x double> %x)
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// WEBASSEMBLY: ret
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}
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f32x4 sqrt_f32x4(f32x4 x) {
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return __builtin_wasm_sqrt_f32x4(x);
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// WEBASSEMBLY: call <4 x float> @llvm.sqrt.v4f32(<4 x float> %x)
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@ -176,8 +176,7 @@ def int_wasm_widen_high_unsigned :
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[llvm_anyvector_ty],
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[IntrNoMem, IntrSpeculatable]>;
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// TODO: Replace these intrinsics with normal ISel patterns once the
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// pmin/pmax instructions are merged to the spec proposal.
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// TODO: Replace these intrinsics with normal ISel patterns
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def int_wasm_pmin :
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Intrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>],
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@ -187,6 +186,26 @@ def int_wasm_pmax :
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[LLVMMatchType<0>, LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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// TODO: Replace these instrinsics with normal ISel patterns once the
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// rounding instructions are merged to the proposal
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// (https://github.com/WebAssembly/simd/pull/232).
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def int_wasm_ceil :
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Intrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_floor :
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Intrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_trunc :
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Intrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_nearest :
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Intrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>],
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[IntrNoMem, IntrSpeculatable]>;
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//===----------------------------------------------------------------------===//
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// Bulk memory intrinsics
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//===----------------------------------------------------------------------===//
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@ -765,6 +765,16 @@ defm NEG : SIMDUnaryFP<fneg, "neg", 225>;
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// Square root: sqrt
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defm SQRT : SIMDUnaryFP<fsqrt, "sqrt", 227>;
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// Rounding: ceil, floor, trunc, nearest
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defm CEIL : SIMDUnary<v4f32, "f32x4", int_wasm_ceil, "ceil", 216>;
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defm FLOOR : SIMDUnary<v4f32, "f32x4", int_wasm_floor, "floor", 217>;
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defm TRUNC: SIMDUnary<v4f32, "f32x4", int_wasm_trunc, "trunc", 218>;
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defm NEAREST: SIMDUnary<v4f32, "f32x4", int_wasm_nearest, "nearest", 219>;
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defm CEIL : SIMDUnary<v2f64, "f64x2", int_wasm_ceil, "ceil", 220>;
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defm FLOOR : SIMDUnary<v2f64, "f64x2", int_wasm_floor, "floor", 221>;
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defm TRUNC: SIMDUnary<v2f64, "f64x2", int_wasm_trunc, "trunc", 222>;
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defm NEAREST: SIMDUnary<v2f64, "f64x2", int_wasm_nearest, "nearest", 223>;
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//===----------------------------------------------------------------------===//
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// Floating-point binary arithmetic
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//===----------------------------------------------------------------------===//
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@ -521,6 +521,46 @@ define <4 x float> @pmax_v4f32(<4 x float> %a, <4 x float> %b) {
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ret <4 x float> %v
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}
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; CHECK-LABEL: ceil_v4f32:
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; SIMD128-NEXT: .functype ceil_v4f32 (v128) -> (v128){{$}}
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; SIMD128-NEXT: f32x4.ceil $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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declare <4 x float> @llvm.wasm.ceil.v4f32(<4 x float>)
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define <4 x float> @ceil_v4f32(<4 x float> %a) {
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%v = call <4 x float> @llvm.wasm.ceil.v4f32(<4 x float> %a)
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ret <4 x float> %v
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}
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; CHECK-LABEL: floor_v4f32:
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; SIMD128-NEXT: .functype floor_v4f32 (v128) -> (v128){{$}}
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; SIMD128-NEXT: f32x4.floor $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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declare <4 x float> @llvm.wasm.floor.v4f32(<4 x float>)
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define <4 x float> @floor_v4f32(<4 x float> %a) {
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%v = call <4 x float> @llvm.wasm.floor.v4f32(<4 x float> %a)
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ret <4 x float> %v
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}
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; CHECK-LABEL: trunc_v4f32:
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; SIMD128-NEXT: .functype trunc_v4f32 (v128) -> (v128){{$}}
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; SIMD128-NEXT: f32x4.trunc $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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declare <4 x float> @llvm.wasm.trunc.v4f32(<4 x float>)
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define <4 x float> @trunc_v4f32(<4 x float> %a) {
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%v = call <4 x float> @llvm.wasm.trunc.v4f32(<4 x float> %a)
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ret <4 x float> %v
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}
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; CHECK-LABEL: nearest_v4f32:
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; SIMD128-NEXT: .functype nearest_v4f32 (v128) -> (v128){{$}}
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; SIMD128-NEXT: f32x4.nearest $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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declare <4 x float> @llvm.wasm.nearest.v4f32(<4 x float>)
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define <4 x float> @nearest_v4f32(<4 x float> %a) {
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%v = call <4 x float> @llvm.wasm.nearest.v4f32(<4 x float> %a)
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ret <4 x float> %v
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}
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; CHECK-LABEL: qfma_v4f32:
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; SIMD128-NEXT: .functype qfma_v4f32 (v128, v128, v128) -> (v128){{$}}
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; SIMD128-NEXT: f32x4.qfma $push[[R:[0-9]+]]=, $0, $1, $2{{$}}
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@ -580,6 +620,46 @@ define <2 x double> @pmax_v2f64(<2 x double> %a, <2 x double> %b) {
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ret <2 x double> %v
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}
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; CHECK-LABEL: ceil_v2f64:
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; SIMD128-NEXT: .functype ceil_v2f64 (v128) -> (v128){{$}}
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; SIMD128-NEXT: f64x2.ceil $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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declare <2 x double> @llvm.wasm.ceil.v2f64(<2 x double>)
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define <2 x double> @ceil_v2f64(<2 x double> %a) {
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%v = call <2 x double> @llvm.wasm.ceil.v2f64(<2 x double> %a)
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ret <2 x double> %v
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}
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; CHECK-LABEL: floor_v2f64:
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; SIMD128-NEXT: .functype floor_v2f64 (v128) -> (v128){{$}}
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; SIMD128-NEXT: f64x2.floor $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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declare <2 x double> @llvm.wasm.floor.v2f64(<2 x double>)
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define <2 x double> @floor_v2f64(<2 x double> %a) {
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%v = call <2 x double> @llvm.wasm.floor.v2f64(<2 x double> %a)
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ret <2 x double> %v
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}
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; CHECK-LABEL: trunc_v2f64:
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; SIMD128-NEXT: .functype trunc_v2f64 (v128) -> (v128){{$}}
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; SIMD128-NEXT: f64x2.trunc $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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declare <2 x double> @llvm.wasm.trunc.v2f64(<2 x double>)
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define <2 x double> @trunc_v2f64(<2 x double> %a) {
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%v = call <2 x double> @llvm.wasm.trunc.v2f64(<2 x double> %a)
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ret <2 x double> %v
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}
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; CHECK-LABEL: nearest_v2f64:
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; SIMD128-NEXT: .functype nearest_v2f64 (v128) -> (v128){{$}}
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; SIMD128-NEXT: f64x2.nearest $push[[R:[0-9]+]]=, $0{{$}}
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; SIMD128-NEXT: return $pop[[R]]{{$}}
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declare <2 x double> @llvm.wasm.nearest.v2f64(<2 x double>)
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define <2 x double> @nearest_v2f64(<2 x double> %a) {
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%v = call <2 x double> @llvm.wasm.nearest.v2f64(<2 x double> %a)
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ret <2 x double> %v
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}
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; CHECK-LABEL: qfma_v2f64:
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; SIMD128-NEXT: .functype qfma_v2f64 (v128, v128, v128) -> (v128){{$}}
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; SIMD128-NEXT: f64x2.qfma $push[[R:[0-9]+]]=, $0, $1, $2{{$}}
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@ -508,6 +508,30 @@ main:
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# CHECK: i64x2.mul # encoding: [0xfd,0xd5,0x01]
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i64x2.mul
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# CHECK: f32x4.ceil # encoding: [0xfd,0xd8,0x01]
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f32x4.ceil
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# CHECK: f32x4.floor # encoding: [0xfd,0xd9,0x01]
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f32x4.floor
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# CHECK: f32x4.trunc # encoding: [0xfd,0xda,0x01]
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f32x4.trunc
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# CHECK: f32x4.nearest # encoding: [0xfd,0xdb,0x01]
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f32x4.nearest
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# CHECK: f64x2.ceil # encoding: [0xfd,0xdc,0x01]
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f64x2.ceil
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# CHECK: f64x2.floor # encoding: [0xfd,0xdd,0x01]
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f64x2.floor
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# CHECK: f64x2.trunc # encoding: [0xfd,0xde,0x01]
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f64x2.trunc
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# CHECK: f64x2.nearest # encoding: [0xfd,0xdf,0x01]
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f64x2.nearest
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# CHECK: f32x4.abs # encoding: [0xfd,0xe0,0x01]
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f32x4.abs
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