forked from OSchip/llvm-project
Remove the experimental (and unused) pre-ra splitting pass. Greedy regalloc can split live ranges.
llvm-svn: 133962
This commit is contained in:
Evan Cheng
parent
163b4a70fb
commit
b7d00313dc
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@ -73,8 +73,6 @@ namespace llvm {
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/// This pass is still in development
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extern char &StrongPHIEliminationID;
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extern char &PreAllocSplittingID;
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/// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
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extern char &LiveStacksID;
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@ -177,7 +177,6 @@ void initializePostDomOnlyViewerPass(PassRegistry&);
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void initializePostDomPrinterPass(PassRegistry&);
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void initializePostDomViewerPass(PassRegistry&);
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void initializePostDominatorTreePass(PassRegistry&);
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void initializePreAllocSplittingPass(PassRegistry&);
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void initializePreVerifierPass(PassRegistry&);
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void initializePrintDbgInfoPass(PassRegistry&);
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void initializePrintFunctionPassPass(PassRegistry&);
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@ -37,7 +37,6 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
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initializeOptimizePHIsPass(Registry);
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initializePHIEliminationPass(Registry);
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initializePeepholeOptimizerPass(Registry);
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initializePreAllocSplittingPass(Registry);
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initializeProcessImplicitDefsPass(Registry);
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initializePEIPass(Registry);
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initializeRALinScanPass(Registry);
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File diff suppressed because it is too large
Load Diff
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@ -57,11 +57,6 @@ NewHeuristic("new-spilling-heuristic",
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cl::desc("Use new spilling heuristic"),
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cl::init(false), cl::Hidden);
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static cl::opt<bool>
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PreSplitIntervals("pre-alloc-split",
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cl::desc("Pre-register allocation live interval splitting"),
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cl::init(false), cl::Hidden);
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static cl::opt<bool>
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TrivCoalesceEnds("trivial-coalesce-ends",
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cl::desc("Attempt trivial coalescing of interval ends"),
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@ -104,7 +99,6 @@ namespace {
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initializeRegisterCoalescerPass(
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*PassRegistry::getPassRegistry());
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initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
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initializePreAllocSplittingPass(*PassRegistry::getPassRegistry());
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initializeLiveStacksPass(*PassRegistry::getPassRegistry());
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initializeMachineDominatorTreePass(*PassRegistry::getPassRegistry());
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initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
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@ -217,8 +211,6 @@ namespace {
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// to coalescing and which analyses coalescing invalidates.
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AU.addRequiredTransitive<RegisterCoalescer>();
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AU.addRequired<CalculateSpillWeights>();
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if (PreSplitIntervals)
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AU.addRequiredID(PreAllocSplittingID);
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AU.addRequiredID(LiveStacksID);
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AU.addPreservedID(LiveStacksID);
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AU.addRequired<MachineLoopInfo>();
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@ -401,7 +393,6 @@ INITIALIZE_PASS_BEGIN(RALinScan, "linearscan-regalloc",
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INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
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INITIALIZE_PASS_DEPENDENCY(StrongPHIElimination)
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INITIALIZE_PASS_DEPENDENCY(CalculateSpillWeights)
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INITIALIZE_PASS_DEPENDENCY(PreAllocSplitting)
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INITIALIZE_PASS_DEPENDENCY(LiveStacks)
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INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
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INITIALIZE_PASS_DEPENDENCY(VirtRegMap)
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@ -1,24 +0,0 @@
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; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan -stats |& \
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; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
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; XFAIL: *
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define void @test(double* %P, i32 %cond) nounwind {
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entry:
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%0 = load double* %P, align 8 ; <double> [#uses=1]
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%1 = fadd double %0, 4.000000e+00 ; <double> [#uses=2]
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%2 = icmp eq i32 %cond, 0 ; <i1> [#uses=1]
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br i1 %2, label %bb1, label %bb
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bb: ; preds = %entry
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%3 = fadd double %1, 4.000000e+00 ; <double> [#uses=1]
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br label %bb1
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bb1: ; preds = %bb, %entry
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%A.0 = phi double [ %3, %bb ], [ %1, %entry ] ; <double> [#uses=1]
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%4 = fmul double %A.0, 4.000000e+00 ; <double> [#uses=1]
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%5 = tail call i32 (...)* @bar() nounwind ; <i32> [#uses=0]
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store double %4, double* %P, align 8
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ret void
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}
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declare i32 @bar(...)
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@ -1,51 +0,0 @@
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; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan
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define i32 @main(i32 %argc, i8** %argv) nounwind {
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entry:
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br label %bb14.i
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bb14.i: ; preds = %bb14.i, %entry
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%i8.0.reg2mem.0.i = phi i32 [ 0, %entry ], [ %0, %bb14.i ] ; <i32> [#uses=1]
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%0 = add i32 %i8.0.reg2mem.0.i, 1 ; <i32> [#uses=2]
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%1 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
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%2 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
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%3 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
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%exitcond75.i = icmp eq i32 %0, 32 ; <i1> [#uses=1]
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br i1 %exitcond75.i, label %bb24.i, label %bb14.i
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bb24.i: ; preds = %bb14.i
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%4 = fdiv double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
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%5 = fdiv double %1, 0.000000e+00 ; <double> [#uses=1]
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%6 = fdiv double %2, 0.000000e+00 ; <double> [#uses=1]
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%7 = fdiv double %3, 0.000000e+00 ; <double> [#uses=1]
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br label %bb31.i
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bb31.i: ; preds = %bb31.i, %bb24.i
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%tmp.0.reg2mem.0.i = phi i32 [ 0, %bb24.i ], [ %indvar.next64.i, %bb31.i ] ; <i32> [#uses=1]
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%indvar.next64.i = add i32 %tmp.0.reg2mem.0.i, 1 ; <i32> [#uses=2]
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%exitcond65.i = icmp eq i32 %indvar.next64.i, 64 ; <i1> [#uses=1]
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br i1 %exitcond65.i, label %bb33.i, label %bb31.i
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bb33.i: ; preds = %bb31.i
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br label %bb35.preheader.i
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bb5.i.i: ; preds = %bb35.preheader.i
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%8 = call double @floor(double 0.000000e+00) nounwind readnone ; <double> [#uses=0]
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br label %bb7.i.i
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bb7.i.i: ; preds = %bb35.preheader.i, %bb5.i.i
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br label %bb35.preheader.i
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bb35.preheader.i: ; preds = %bb7.i.i, %bb33.i
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%9 = fsub double 0.000000e+00, %4 ; <double> [#uses=1]
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store double %9, double* null, align 8
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%10 = fsub double 0.000000e+00, %5 ; <double> [#uses=1]
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store double %10, double* null, align 8
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%11 = fsub double 0.000000e+00, %6 ; <double> [#uses=1]
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store double %11, double* null, align 8
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%12 = fsub double 0.000000e+00, %7 ; <double> [#uses=1]
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store double %12, double* null, align 8
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br i1 false, label %bb7.i.i, label %bb5.i.i
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}
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declare double @floor(double) nounwind readnone
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@ -1,34 +0,0 @@
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 -pre-alloc-split -regalloc=linearscan | FileCheck %s
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@.str = private constant [28 x i8] c"\0A\0ADOUBLE D = %f\0A\00", align 1 ; <[28 x i8]*> [#uses=1]
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@.str1 = private constant [37 x i8] c"double to long l1 = %ld\09\09(0x%lx)\0A\00", align 8 ; <[37 x i8]*> [#uses=1]
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@.str2 = private constant [35 x i8] c"double to uint ui1 = %u\09\09(0x%x)\0A\00", align 8 ; <[35 x i8]*> [#uses=1]
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@.str3 = private constant [37 x i8] c"double to ulong ul1 = %lu\09\09(0x%lx)\0A\00", align 8 ; <[37 x i8]*> [#uses=1]
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define i32 @main(i32 %argc, i8** nocapture %argv) nounwind ssp {
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; CHECK: movsd %xmm0, (%rsp)
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entry:
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%0 = icmp sgt i32 %argc, 4 ; <i1> [#uses=1]
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br i1 %0, label %bb, label %bb2
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bb: ; preds = %entry
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%1 = getelementptr inbounds i8** %argv, i64 4 ; <i8**> [#uses=1]
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%2 = load i8** %1, align 8 ; <i8*> [#uses=1]
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%3 = tail call double @atof(i8* %2) nounwind ; <double> [#uses=1]
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br label %bb2
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bb2: ; preds = %bb, %entry
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%storemerge = phi double [ %3, %bb ], [ 2.000000e+00, %entry ] ; <double> [#uses=4]
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%4 = fptoui double %storemerge to i32 ; <i32> [#uses=2]
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%5 = fptoui double %storemerge to i64 ; <i64> [#uses=2]
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%6 = fptosi double %storemerge to i64 ; <i64> [#uses=2]
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%7 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([28 x i8]* @.str, i64 0, i64 0), double %storemerge) nounwind ; <i32> [#uses=0]
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%8 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([37 x i8]* @.str1, i64 0, i64 0), i64 %6, i64 %6) nounwind ; <i32> [#uses=0]
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%9 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([35 x i8]* @.str2, i64 0, i64 0), i32 %4, i32 %4) nounwind ; <i32> [#uses=0]
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%10 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([37 x i8]* @.str3, i64 0, i64 0), i64 %5, i64 %5) nounwind ; <i32> [#uses=0]
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ret i32 0
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}
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declare double @atof(i8* nocapture) nounwind readonly
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declare i32 @printf(i8* nocapture, ...) nounwind
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@ -1,26 +0,0 @@
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; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan -stats |& \
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; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 2
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define i32 @main(i32 %argc, i8** %argv) nounwind {
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entry:
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br label %bb
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bb: ; preds = %bb, %entry
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%k.0.reg2mem.0 = phi double [ 1.000000e+00, %entry ], [ %6, %bb ] ; <double> [#uses=2]
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%Flint.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %5, %bb ] ; <double> [#uses=1]
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%twoThrd.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=1]
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%0 = tail call double @llvm.pow.f64(double 0x3FE5555555555555, double 0.000000e+00) ; <double> [#uses=1]
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%1 = fadd double %0, %twoThrd.0.reg2mem.0 ; <double> [#uses=1]
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%2 = tail call double @sin(double %k.0.reg2mem.0) nounwind readonly ; <double> [#uses=1]
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%3 = fmul double 0.000000e+00, %2 ; <double> [#uses=1]
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%4 = fdiv double 1.000000e+00, %3 ; <double> [#uses=1]
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store double %Flint.0.reg2mem.0, double* null
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store double %twoThrd.0.reg2mem.0, double* null
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%5 = fadd double %4, %Flint.0.reg2mem.0 ; <double> [#uses=1]
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%6 = fadd double %k.0.reg2mem.0, 1.000000e+00 ; <double> [#uses=1]
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br label %bb
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}
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declare double @llvm.pow.f64(double, double) nounwind readonly
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declare double @sin(double) nounwind readonly
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@ -1,56 +0,0 @@
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; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan
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target triple = "i386-apple-darwin9.5"
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%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
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%struct.__sFILEX = type opaque
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%struct.__sbuf = type { i8*, i32 }
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@"\01LC1" = external constant [48 x i8] ; <[48 x i8]*> [#uses=1]
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define i32 @main() nounwind {
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entry:
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br label %bb5.us
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bb5.us: ; preds = %bb8.split, %bb5.us, %entry
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%i.0.reg2mem.0.ph = phi i32 [ 0, %entry ], [ %indvar.next53, %bb8.split ], [ %i.0.reg2mem.0.ph, %bb5.us ] ; <i32> [#uses=2]
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%j.0.reg2mem.0.us = phi i32 [ %indvar.next47, %bb5.us ], [ 0, %bb8.split ], [ 0, %entry ] ; <i32> [#uses=1]
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%indvar.next47 = add i32 %j.0.reg2mem.0.us, 1 ; <i32> [#uses=2]
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%exitcond48 = icmp eq i32 %indvar.next47, 256 ; <i1> [#uses=1]
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br i1 %exitcond48, label %bb8.split, label %bb5.us
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bb8.split: ; preds = %bb5.us
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%indvar.next53 = add i32 %i.0.reg2mem.0.ph, 1 ; <i32> [#uses=2]
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%exitcond54 = icmp eq i32 %indvar.next53, 256 ; <i1> [#uses=1]
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br i1 %exitcond54, label %bb11, label %bb5.us
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bb11: ; preds = %bb11, %bb8.split
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%i.1.reg2mem.0 = phi i32 [ %indvar.next44, %bb11 ], [ 0, %bb8.split ] ; <i32> [#uses=1]
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%indvar.next44 = add i32 %i.1.reg2mem.0, 1 ; <i32> [#uses=2]
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%exitcond45 = icmp eq i32 %indvar.next44, 63 ; <i1> [#uses=1]
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br i1 %exitcond45, label %bb14, label %bb11
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bb14: ; preds = %bb14, %bb11
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%indvar = phi i32 [ %indvar.next40, %bb14 ], [ 0, %bb11 ] ; <i32> [#uses=1]
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%indvar.next40 = add i32 %indvar, 1 ; <i32> [#uses=2]
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%exitcond41 = icmp eq i32 %indvar.next40, 32768 ; <i1> [#uses=1]
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br i1 %exitcond41, label %bb28, label %bb14
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bb28: ; preds = %bb14
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%0 = fdiv double 2.550000e+02, 0.000000e+00 ; <double> [#uses=1]
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br label %bb30
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bb30: ; preds = %bb36, %bb28
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%m.1.reg2mem.0 = phi i32 [ %m.0, %bb36 ], [ 0, %bb28 ] ; <i32> [#uses=1]
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%1 = fmul double 0.000000e+00, %0 ; <double> [#uses=1]
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%2 = fptosi double %1 to i32 ; <i32> [#uses=1]
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br i1 false, label %bb36, label %bb35
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bb35: ; preds = %bb30
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%3 = tail call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* null, i8* getelementptr ([48 x i8]* @"\01LC1", i32 0, i32 0), i32 0, i32 0, i32 0, i32 %2) nounwind ; <i32> [#uses=0]
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br label %bb36
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bb36: ; preds = %bb35, %bb30
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%m.0 = phi i32 [ 0, %bb35 ], [ %m.1.reg2mem.0, %bb30 ] ; <i32> [#uses=1]
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br label %bb30
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}
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declare i32 @fprintf(%struct.FILE*, i8*, ...) nounwind
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@ -1,36 +0,0 @@
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; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -pre-alloc-split -regalloc=linearscan | grep {divsd 24} | count 1
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@current_surfaces.b = external global i1 ; <i1*> [#uses=1]
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declare double @sin(double) nounwind readonly
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declare double @asin(double) nounwind readonly
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define fastcc void @trace_line(i32 %line) nounwind {
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entry:
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%.b3 = load i1* @current_surfaces.b ; <i1> [#uses=1]
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br i1 %.b3, label %bb.nph, label %return
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bb.nph: ; preds = %entry
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%0 = load double* null, align 8 ; <double> [#uses=1]
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%1 = load double* null, align 8 ; <double> [#uses=2]
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%2 = fcmp une double %0, 0.000000e+00 ; <i1> [#uses=1]
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br i1 %2, label %bb9.i, label %bb13.i
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bb9.i: ; preds = %bb.nph
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%3 = tail call double @asin(double 0.000000e+00) nounwind readonly ; <double> [#uses=0]
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%4 = fdiv double 1.000000e+00, %1 ; <double> [#uses=1]
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%5 = fmul double %4, 0.000000e+00 ; <double> [#uses=1]
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%6 = tail call double @asin(double %5) nounwind readonly ; <double> [#uses=0]
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unreachable
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bb13.i: ; preds = %bb.nph
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%7 = fdiv double 1.000000e+00, %1 ; <double> [#uses=1]
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%8 = tail call double @sin(double 0.000000e+00) nounwind readonly ; <double> [#uses=1]
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%9 = fmul double %7, %8 ; <double> [#uses=1]
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%10 = tail call double @asin(double %9) nounwind readonly ; <double> [#uses=0]
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unreachable
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return: ; preds = %entry
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ret void
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}
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@ -1,34 +0,0 @@
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; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan
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@object_distance = external global double, align 8 ; <double*> [#uses=1]
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@axis_slope_angle = external global double, align 8 ; <double*> [#uses=1]
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@current_surfaces.b = external global i1 ; <i1*> [#uses=1]
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declare double @sin(double) nounwind readonly
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declare double @asin(double) nounwind readonly
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declare double @tan(double) nounwind readonly
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define fastcc void @trace_line(i32 %line) nounwind {
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entry:
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%.b3 = load i1* @current_surfaces.b ; <i1> [#uses=1]
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br i1 %.b3, label %bb, label %return
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bb: ; preds = %bb, %entry
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%0 = tail call double @asin(double 0.000000e+00) nounwind readonly ; <double> [#uses=1]
|
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%1 = fadd double 0.000000e+00, %0 ; <double> [#uses=2]
|
||||
%2 = tail call double @asin(double 0.000000e+00) nounwind readonly ; <double> [#uses=1]
|
||||
%3 = fsub double %1, %2 ; <double> [#uses=2]
|
||||
store double %3, double* @axis_slope_angle, align 8
|
||||
%4 = fdiv double %1, 2.000000e+00 ; <double> [#uses=1]
|
||||
%5 = tail call double @sin(double %4) nounwind readonly ; <double> [#uses=1]
|
||||
%6 = fmul double 0.000000e+00, %5 ; <double> [#uses=1]
|
||||
%7 = tail call double @tan(double %3) nounwind readonly ; <double> [#uses=0]
|
||||
%8 = fadd double 0.000000e+00, %6 ; <double> [#uses=1]
|
||||
store double %8, double* @object_distance, align 8
|
||||
br label %bb
|
||||
|
||||
return: ; preds = %entry
|
||||
ret void
|
||||
}
|
||||
|
|
@ -1,35 +0,0 @@
|
|||
; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan -stats |& \
|
||||
; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
|
||||
|
||||
@current_surfaces.b = external global i1 ; <i1*> [#uses=1]
|
||||
|
||||
declare double @asin(double) nounwind readonly
|
||||
|
||||
declare double @tan(double) nounwind readonly
|
||||
|
||||
define fastcc void @trace_line(i32 %line) nounwind {
|
||||
entry:
|
||||
%.b3 = load i1* @current_surfaces.b ; <i1> [#uses=1]
|
||||
br i1 %.b3, label %bb, label %return
|
||||
|
||||
bb: ; preds = %bb9.i, %entry
|
||||
%.rle4 = phi double [ %7, %bb9.i ], [ 0.000000e+00, %entry ] ; <double> [#uses=1]
|
||||
%0 = load double* null, align 8 ; <double> [#uses=3]
|
||||
%1 = fcmp une double %0, 0.000000e+00 ; <i1> [#uses=1]
|
||||
br i1 %1, label %bb9.i, label %bb13.i
|
||||
|
||||
bb9.i: ; preds = %bb
|
||||
%2 = fsub double %.rle4, %0 ; <double> [#uses=0]
|
||||
%3 = tail call double @asin(double %.rle4) nounwind readonly ; <double> [#uses=0]
|
||||
%4 = fmul double 0.000000e+00, %0 ; <double> [#uses=1]
|
||||
%5 = tail call double @tan(double 0.000000e+00) nounwind readonly ; <double> [#uses=0]
|
||||
%6 = fmul double %4, 0.000000e+00 ; <double> [#uses=1]
|
||||
%7 = fadd double %6, 0.000000e+00 ; <double> [#uses=1]
|
||||
br i1 false, label %return, label %bb
|
||||
|
||||
bb13.i: ; preds = %bb
|
||||
unreachable
|
||||
|
||||
return: ; preds = %bb9.i, %entry
|
||||
ret void
|
||||
}
|
||||
|
|
@ -1,38 +0,0 @@
|
|||
; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan -stats |& \
|
||||
; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
|
||||
|
||||
@current_surfaces.b = external global i1 ; <i1*> [#uses=1]
|
||||
|
||||
declare double @sin(double) nounwind readonly
|
||||
|
||||
declare double @asin(double) nounwind readonly
|
||||
|
||||
declare double @tan(double) nounwind readonly
|
||||
|
||||
define fastcc void @trace_line(i32 %line) nounwind {
|
||||
entry:
|
||||
%.b3 = load i1* @current_surfaces.b ; <i1> [#uses=1]
|
||||
br i1 %.b3, label %bb, label %return
|
||||
|
||||
bb: ; preds = %bb9.i, %entry
|
||||
%.rle4 = phi double [ %8, %bb9.i ], [ 0.000000e+00, %entry ] ; <double> [#uses=1]
|
||||
%0 = load double* null, align 8 ; <double> [#uses=3]
|
||||
%1 = fcmp une double %0, 0.000000e+00 ; <i1> [#uses=1]
|
||||
br i1 %1, label %bb9.i, label %bb13.i
|
||||
|
||||
bb9.i: ; preds = %bb
|
||||
%2 = fsub double %.rle4, %0 ; <double> [#uses=0]
|
||||
%3 = tail call double @asin(double %.rle4) nounwind readonly ; <double> [#uses=0]
|
||||
%4 = tail call double @sin(double 0.000000e+00) nounwind readonly ; <double> [#uses=1]
|
||||
%5 = fmul double %4, %0 ; <double> [#uses=1]
|
||||
%6 = tail call double @tan(double 0.000000e+00) nounwind readonly ; <double> [#uses=0]
|
||||
%7 = fmul double %5, 0.000000e+00 ; <double> [#uses=1]
|
||||
%8 = fadd double %7, 0.000000e+00 ; <double> [#uses=1]
|
||||
br i1 false, label %return, label %bb
|
||||
|
||||
bb13.i: ; preds = %bb
|
||||
unreachable
|
||||
|
||||
return: ; preds = %bb9.i, %entry
|
||||
ret void
|
||||
}
|
||||
Loading…
Reference in New Issue