forked from OSchip/llvm-project
[LV] Avoid potentential division by zero when selecting IC
llvm-svn: 303174
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@ -6550,8 +6550,8 @@ unsigned LoopVectorizationCostModel::selectInterleaveCount(bool OptForSize,
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// We assume that the cost overhead is 1 and we use the cost model
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// to estimate the cost of the loop and interleave until the cost of the
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// loop overhead is about 5% of the cost of the loop.
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unsigned SmallIC =
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std::min(IC, (unsigned)PowerOf2Floor(SmallLoopCost / LoopCost));
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unsigned SmallIC = std::min(
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IC, (unsigned)PowerOf2Floor(SmallLoopCost / LoopCost ? LoopCost : 1));
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// Interleave until store/load ports (estimated by max interleave count) are
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// saturated.
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@ -0,0 +1,33 @@
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; RUN: opt < %s -loop-vectorize -force-target-instruction-cost=0 -force-vector-width=2 -instcombine -S | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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; CHECK-LABEL: @copy(
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, i64* %a, i64 [[INDEX]]
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i64, i64* %b, i64 [[INDEX]]
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast i64* [[TMP3]] to <2 x i64>*
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, <2 x i64>* [[TMP4]], align 8
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; CHECK-NEXT: [[TMP5:%.*]] = bitcast i64* [[TMP2]] to <2 x i64>*
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; CHECK-NEXT: store <2 x i64> [[WIDE_LOAD]], <2 x i64>* [[TMP5]], align 8
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; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 2
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; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body
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;
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define void @copy(i64* %a, i64* %b, i64 %n) {
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entry:
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br label %for.body
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for.body:
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%i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
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%tmp0 = getelementptr inbounds i64, i64* %a, i64 %i
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%tmp1 = getelementptr inbounds i64, i64* %b, i64 %i
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%tmp3 = load i64, i64* %tmp1, align 8
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store i64 %tmp3, i64* %tmp0, align 8
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%i.next = add nuw nsw i64 %i, 1
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%cond = icmp slt i64 %i.next, %n
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br i1 %cond, label %for.body, label %for.end
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for.end:
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ret void
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}
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