forked from OSchip/llvm-project
[MIB] Create a helper function getRegState to extract all register flags
llvm-svn: 269414
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@ -386,6 +386,17 @@ inline unsigned getDebugRegState(bool B) {
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return B ? RegState::Debug : 0;
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}
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/// Get all register state flags from machine operand \p RegOp.
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inline unsigned getRegState(const MachineOperand &RegOp) {
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assert(RegOp.isReg() && "Not a register operand");
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return getDefRegState(RegOp.isDef()) |
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getImplRegState(RegOp.isImplicit()) |
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getKillRegState(RegOp.isKill()) |
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getDeadRegState(RegOp.isDead()) |
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getUndefRegState(RegOp.isUndef()) |
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getInternalReadRegState(RegOp.isInternalRead()) |
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getDebugRegState(RegOp.isDebug());
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}
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/// Helper class for constructing bundles of MachineInstrs.
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///
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@ -108,18 +108,6 @@ INITIALIZE_PASS(HexagonSplitDoubleRegs, "hexagon-split-double",
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"Hexagon Split Double Registers", false, false)
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static inline uint32_t getRegState(const MachineOperand &R) {
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assert(R.isReg());
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return getDefRegState(R.isDef()) |
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getImplRegState(R.isImplicit()) |
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getKillRegState(R.isKill()) |
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getDeadRegState(R.isDead()) |
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getUndefRegState(R.isUndef()) |
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getInternalReadRegState(R.isInternalRead()) |
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(R.isDebug() ? RegState::Debug : 0);
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}
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void HexagonSplitDoubleRegs::dump_partition(raw_ostream &os,
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const USet &Part, const TargetRegisterInfo &TRI) {
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dbgs() << '{';
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