forked from OSchip/llvm-project
Add support for register alias set description
llvm-svn: 5080
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@ -16,12 +16,16 @@ class Type;
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class MachineFunction;
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/// MRegisterDesc - This record contains all of the information known about a
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/// particular register.
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/// particular register. The AliasSet field (if not null) contains a pointer to
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/// a Zero terminated array of registers that this register aliases. This is
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/// needed for architectures like X86 which have AL alias AX alias EAX.
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/// Registers that this does not apply to simply should set this to null.
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///
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struct MRegisterDesc {
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const char *Name; // Assembly language name for the register
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unsigned Flags; // Flags identifying register properties (defined below)
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unsigned TSFlags; // Target Specific Flags
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const char *Name; // Assembly language name for the register
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const unsigned *AliasSet; // Register Alias Set, described above
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unsigned Flags; // Flags identifying register properties (below)
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unsigned TSFlags; // Target Specific Flags
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};
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/// MRF namespace - This namespace contains flags that pertain to machine
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@ -88,7 +92,7 @@ public:
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/// produce a value. Some frontends may use this as an operand register to
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/// mean special things, for example, the Sparc backend uses R0 to mean %g0
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/// which always PRODUCES the value 0. The X86 backend does not use this
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/// value as an operand register.
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/// value as an operand register, except for memory references.
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///
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NoRegister = 0,
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@ -111,6 +115,13 @@ public:
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///
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const MRegisterDesc &get(unsigned RegNo) const { return operator[](RegNo); }
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/// getAliasSet - Return the set of registers aliased by the specified
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/// register, or a null list of there are none. The list returned is zero
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/// terminated.
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///
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const unsigned *getAliasSet(unsigned RegNo) const {
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return get(RegNo).AliasSet;
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}
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virtual MachineBasicBlock::iterator
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storeReg2RegOffset(MachineBasicBlock &MBB,
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