forked from OSchip/llvm-project
[LV] Fix PR45525: Incorrect assert in blend recipe
Fix an assert introduced in 41ed5d856c1: a phi with a single predecessor and a mask is a valid case which is already supported by the code. Differential Revision: https://reviews.llvm.org/D78115
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@ -7463,8 +7463,11 @@ void VPBlendRecipe::execute(VPTransformState &State) {
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// Generate a sequence of selects of the form:
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// SELECT(Mask3, In3,
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// SELECT(Mask2, In2,
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// ( ...)))
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// SELECT(Mask2, In2,
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// SELECT(Mask1, In1,
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// In0)))
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// Note that Mask0 is never used: lanes for which no path reaches this phi and
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// are essentially undef are taken from In0.
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InnerLoopVectorizer::VectorParts Entry(State.UF);
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for (unsigned In = 0; In < NumIncoming; ++In) {
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for (unsigned Part = 0; Part < State.UF; ++Part) {
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@ -929,16 +929,16 @@ class VPBlendRecipe : public VPRecipeBase {
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/// The blend operation is a User of the incoming values and of their
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/// respective masks, ordered [I0, M0, I1, M1, ...]. Note that a single value
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/// would be incoming with a full mask for which there is no VPValue.
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/// might be incoming with a full mask for which there is no VPValue.
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VPUser User;
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public:
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VPBlendRecipe(PHINode *Phi, ArrayRef<VPValue *> Operands)
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: VPRecipeBase(VPBlendSC), Phi(Phi), User(Operands) {
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assert(((Operands.size() == 1) ||
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(Operands.size() > 2 && Operands.size() % 2 == 0)) &&
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"Expected either a single incoming value or a greater than two and "
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"even number of operands");
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assert(Operands.size() > 0 &&
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((Operands.size() == 1) || (Operands.size() % 2 == 0)) &&
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"Expected either a single incoming value or a positive even number "
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"of operands");
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}
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/// Method to support type inquiry through isa, cast, and dyn_cast.
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@ -0,0 +1,37 @@
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; RUN: opt < %s -loop-vectorize -force-vector-width=4 -S | FileCheck %s
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; Test case for PR45525. Checks that phi's with a single predecessor and a mask are supported.
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define void @main(i1 %cond, i32* %arr) {
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; CHECK-LABEL: @main(
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; CHECK-NEXT: bb.0:
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; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK: [[TMP5:%.*]] = mul <4 x i32> [[VEC_IND]], <i32 3, i32 3, i32 3, i32 3>
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;
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bb.0:
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br label %bb.1
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bb.1: ; preds = %bb.3, %bb.0
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%iv = phi i32 [ 0, %bb.0 ], [ %iv.next, %bb.3 ]
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br i1 %cond, label %bb.3, label %bb.2
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bb.2: ; preds = %bb.1
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%single.pred = phi i32 [ %iv, %bb.1 ]
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%mult = mul i32 %single.pred, 3
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br label %bb.3
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bb.3: ; preds = %bb.2, %bb.1
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%stored.value = phi i32 [ 7, %bb.1 ], [ %mult, %bb.2 ]
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%arrayidx = getelementptr inbounds i32, i32* %arr, i32 %iv
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store i32 %stored.value, i32* %arrayidx
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%iv.next = add i32 %iv, 1
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%continue = icmp ult i32 %iv.next, 32
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br i1 %continue, label %bb.1, label %bb.4
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bb.4: ; preds = %bb.3
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ret void
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}
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