forked from OSchip/llvm-project
AMDGPU: Insert skip branches over return blocks
SIInsertSkips really doesn't understand the control flow, and makes very stupid assumptions about the block layout. This was able to get away with not skipping return blocks, since usually after structurization there is only one placed at the end of the function. Tail duplication can break this assumption. llvm-svn: 362754
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@ -109,9 +109,6 @@ static bool opcodeEmitsNoInsts(unsigned Opc) {
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bool SIInsertSkips::shouldSkip(const MachineBasicBlock &From,
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const MachineBasicBlock &To) const {
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if (From.succ_empty())
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return false;
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unsigned NumInstr = 0;
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const MachineFunction *MF = From.getParent();
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@ -2479,6 +2479,10 @@ bool SIInstrInfo::hasUnwantedEffectsWhenEXECEmpty(const MachineInstr &MI) const
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if (MI.mayStore() && isSMRD(MI))
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return true; // scalar store or atomic
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// This will terminate the function when other lanes may need to continue.
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if (MI.isReturn())
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return true;
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// These instructions cause shader I/O that may cause hardware lockups
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// when executed with an empty EXEC mask.
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//
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@ -0,0 +1,194 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -run-pass=si-insert-skips -amdgpu-skip-threshold=1000000 -o - %s | FileCheck %s
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---
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name: skip_branch_taildup_endpgm
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machineFunctionInfo:
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isEntryFunction: true
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body: |
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; CHECK-LABEL: name: skip_branch_taildup_endpgm
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; CHECK: bb.0:
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; CHECK: successors: %bb.3(0x40000000), %bb.1(0x40000000)
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; CHECK: renamable $sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM renamable $sgpr4_sgpr5, 4, 0, 0 :: (dereferenceable invariant load 8, align 16, addrspace 4)
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; CHECK: renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec
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; CHECK: S_WAITCNT 127
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; CHECK: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $exec
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; CHECK: renamable $vgpr0 = V_ADD_I32_e32 $sgpr0, killed $vgpr0, implicit-def $vcc, implicit $exec
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; CHECK: renamable $vgpr1 = V_ADDC_U32_e32 0, killed $vgpr1, implicit-def $vcc, implicit killed $vcc, implicit $exec
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; CHECK: renamable $vgpr0 = FLAT_LOAD_DWORD renamable $vgpr0_vgpr1, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4, addrspace 1)
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; CHECK: renamable $sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0, 0 :: (dereferenceable invariant load 8, align 16, addrspace 4)
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; CHECK: S_WAITCNT 112
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; CHECK: V_CMP_NE_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
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; CHECK: $sgpr2_sgpr3 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
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; CHECK: renamable $sgpr2_sgpr3 = S_XOR_B64 $exec, killed renamable $sgpr2_sgpr3, implicit-def dead $scc
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; CHECK: SI_MASK_BRANCH %bb.1, implicit $exec
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; CHECK: S_CBRANCH_EXECZ %bb.1, implicit $exec
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; CHECK: S_BRANCH %bb.3
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; CHECK: bb.1:
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; CHECK: successors: %bb.4(0x40000000), %bb.2(0x40000000)
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; CHECK: renamable $sgpr2_sgpr3 = S_OR_SAVEEXEC_B64 killed renamable $sgpr2_sgpr3, implicit-def $exec, implicit-def $scc, implicit $exec
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; CHECK: $exec = S_XOR_B64 $exec, renamable $sgpr2_sgpr3, implicit-def $scc
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; CHECK: SI_MASK_BRANCH %bb.2, implicit $exec
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; CHECK: S_CBRANCH_EXECZ %bb.2, implicit $exec
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; CHECK: S_BRANCH %bb.4
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; CHECK: bb.2:
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; CHECK: $exec = S_OR_B64 $exec, killed renamable $sgpr2_sgpr3, implicit-def $scc
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; CHECK: renamable $vgpr0 = V_MOV_B32_e32 32, implicit $exec
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; CHECK: S_ENDPGM 0
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; CHECK: bb.3:
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; CHECK: successors: %bb.4(0x40000000), %bb.2(0x40000000)
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; CHECK: renamable $vgpr2 = V_MOV_B32_e32 15, implicit $exec
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; CHECK: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1
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; CHECK: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1, implicit $exec
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; CHECK: renamable $sgpr2_sgpr3 = S_OR_SAVEEXEC_B64 killed renamable $sgpr2_sgpr3, implicit-def $exec, implicit-def $scc, implicit $exec
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; CHECK: $exec = S_XOR_B64 $exec, renamable $sgpr2_sgpr3, implicit-def $scc
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; CHECK: SI_MASK_BRANCH %bb.2, implicit $exec
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; CHECK: S_CBRANCH_EXECZ %bb.2, implicit $exec
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; CHECK: bb.4:
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; CHECK: renamable $vgpr2 = V_MOV_B32_e32 8, implicit $exec
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; CHECK: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1
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; CHECK: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit killed $sgpr0_sgpr1, implicit $exec
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; CHECK: $exec = S_OR_B64 $exec, killed renamable $sgpr2_sgpr3, implicit-def $scc
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; CHECK: renamable $vgpr0 = V_MOV_B32_e32 32, implicit $exec
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; CHECK: S_ENDPGM 0
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bb.0:
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successors: %bb.1, %bb.2
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liveins: $vgpr0, $sgpr4_sgpr5, $sgpr7
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renamable $sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM renamable $sgpr4_sgpr5, 4, 0, 0 :: (dereferenceable invariant load 8, align 16, addrspace 4)
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renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec
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S_WAITCNT 127
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$vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $exec
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renamable $vgpr0 = V_ADD_I32_e32 $sgpr0, killed $vgpr0, implicit-def $vcc, implicit $exec
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renamable $vgpr1 = V_ADDC_U32_e32 0, killed $vgpr1, implicit-def $vcc, implicit killed $vcc, implicit $exec
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renamable $vgpr0 = FLAT_LOAD_DWORD renamable $vgpr0_vgpr1, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4, addrspace 1)
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renamable $sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0, 0 :: (dereferenceable invariant load 8, align 16, addrspace 4)
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S_WAITCNT 112
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V_CMP_NE_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
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$sgpr2_sgpr3 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
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renamable $sgpr2_sgpr3 = S_XOR_B64 $exec, killed renamable $sgpr2_sgpr3, implicit-def dead $scc
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SI_MASK_BRANCH %bb.2, implicit $exec
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S_BRANCH %bb.1
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bb.2:
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successors: %bb.3, %bb.4
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liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
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renamable $sgpr2_sgpr3 = S_OR_SAVEEXEC_B64 killed renamable $sgpr2_sgpr3, implicit-def $exec, implicit-def $scc, implicit $exec
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$exec = S_XOR_B64 $exec, renamable $sgpr2_sgpr3, implicit-def $scc
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SI_MASK_BRANCH %bb.4, implicit $exec
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S_BRANCH %bb.3
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bb.4:
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liveins: $sgpr2_sgpr3
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$exec = S_OR_B64 $exec, killed renamable $sgpr2_sgpr3, implicit-def $scc
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renamable $vgpr0 = V_MOV_B32_e32 32, implicit $exec
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S_ENDPGM 0
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bb.1:
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successors: %bb.3, %bb.4
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liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
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renamable $vgpr2 = V_MOV_B32_e32 15, implicit $exec
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$vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1
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$vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1, implicit $exec
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renamable $sgpr2_sgpr3 = S_OR_SAVEEXEC_B64 killed renamable $sgpr2_sgpr3, implicit-def $exec, implicit-def $scc, implicit $exec
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$exec = S_XOR_B64 $exec, renamable $sgpr2_sgpr3, implicit-def $scc
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SI_MASK_BRANCH %bb.4, implicit $exec
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S_BRANCH %bb.3
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bb.3:
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liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
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renamable $vgpr2 = V_MOV_B32_e32 8, implicit $exec
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$vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1
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$vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit killed $sgpr0_sgpr1, implicit $exec
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$exec = S_OR_B64 $exec, killed renamable $sgpr2_sgpr3, implicit-def $scc
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renamable $vgpr0 = V_MOV_B32_e32 32, implicit $exec
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S_ENDPGM 0
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...
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---
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name: skip_branch_taildup_ret
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body: |
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; CHECK-LABEL: name: skip_branch_taildup_ret
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; CHECK: bb.0:
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; CHECK: successors: %bb.3(0x40000000), %bb.1(0x40000000)
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; CHECK: S_WAITCNT 0
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; CHECK: V_CMP_NE_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
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; CHECK: $sgpr6_sgpr7 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
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; CHECK: renamable $sgpr6_sgpr7 = S_XOR_B64 $exec, killed renamable $sgpr6_sgpr7, implicit-def dead $scc
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; CHECK: SI_MASK_BRANCH %bb.1, implicit $exec
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; CHECK: S_CBRANCH_EXECZ %bb.1, implicit $exec
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; CHECK: S_BRANCH %bb.3
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; CHECK: bb.1:
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; CHECK: successors: %bb.4(0x40000000), %bb.2(0x40000000)
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; CHECK: renamable $sgpr6_sgpr7 = S_OR_SAVEEXEC_B64 killed renamable $sgpr6_sgpr7, implicit-def $exec, implicit-def $scc, implicit $exec
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; CHECK: $exec = S_XOR_B64 $exec, renamable $sgpr6_sgpr7, implicit-def $scc
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; CHECK: SI_MASK_BRANCH %bb.2, implicit $exec
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; CHECK: S_CBRANCH_EXECZ %bb.2, implicit $exec
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; CHECK: S_BRANCH %bb.4
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; CHECK: bb.2:
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; CHECK: $exec = S_OR_B64 $exec, killed renamable $sgpr6_sgpr7, implicit-def $scc
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; CHECK: renamable $vgpr0 = V_MOV_B32_e32 32, implicit $exec
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; CHECK: S_SETPC_B64_return $sgpr30_sgpr31
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; CHECK: bb.3:
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; CHECK: successors: %bb.4(0x40000000), %bb.2(0x40000000)
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; CHECK: renamable $vgpr0 = V_MOV_B32_e32 15, implicit $exec
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; CHECK: renamable $sgpr6_sgpr7 = S_OR_SAVEEXEC_B64 killed renamable $sgpr6_sgpr7, implicit-def $exec, implicit-def $scc, implicit $exec
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; CHECK: $exec = S_XOR_B64 $exec, renamable $sgpr6_sgpr7, implicit-def $scc
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; CHECK: SI_MASK_BRANCH %bb.2, implicit $exec
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; CHECK: S_CBRANCH_EXECZ %bb.2, implicit $exec
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; CHECK: bb.4:
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; CHECK: renamable $vgpr0 = V_MOV_B32_e32 8, implicit $exec
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; CHECK: $exec = S_OR_B64 $exec, killed renamable $sgpr6_sgpr7, implicit-def $scc
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; CHECK: renamable $vgpr0 = V_MOV_B32_e32 32, implicit $exec
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; CHECK: S_SETPC_B64_return $sgpr30_sgpr31
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bb.0:
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successors: %bb.1, %bb.2
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liveins: $vgpr0, $sgpr30_sgpr31, $vgpr1_vgpr2
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S_WAITCNT 0
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V_CMP_NE_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
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$sgpr6_sgpr7 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
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renamable $sgpr6_sgpr7 = S_XOR_B64 $exec, killed renamable $sgpr6_sgpr7, implicit-def dead $scc
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SI_MASK_BRANCH %bb.2, implicit $exec
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S_BRANCH %bb.1
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bb.2:
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successors: %bb.3, %bb.4
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liveins: $sgpr6_sgpr7, $sgpr30_sgpr31, $vgpr1_vgpr2
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renamable $sgpr6_sgpr7 = S_OR_SAVEEXEC_B64 killed renamable $sgpr6_sgpr7, implicit-def $exec, implicit-def $scc, implicit $exec
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$exec = S_XOR_B64 $exec, renamable $sgpr6_sgpr7, implicit-def $scc
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SI_MASK_BRANCH %bb.4, implicit $exec
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S_BRANCH %bb.3
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bb.4:
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liveins: $sgpr6_sgpr7, $sgpr30_sgpr31
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$exec = S_OR_B64 $exec, killed renamable $sgpr6_sgpr7, implicit-def $scc
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renamable $vgpr0 = V_MOV_B32_e32 32, implicit $exec
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S_SETPC_B64_return $sgpr30_sgpr31
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bb.1:
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successors: %bb.3, %bb.4
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liveins: $sgpr6_sgpr7, $sgpr30_sgpr31, $vgpr1_vgpr2
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renamable $vgpr0 = V_MOV_B32_e32 15, implicit $exec
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renamable $sgpr6_sgpr7 = S_OR_SAVEEXEC_B64 killed renamable $sgpr6_sgpr7, implicit-def $exec, implicit-def $scc, implicit $exec
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$exec = S_XOR_B64 $exec, renamable $sgpr6_sgpr7, implicit-def $scc
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SI_MASK_BRANCH %bb.4, implicit $exec
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S_BRANCH %bb.3
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bb.3:
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liveins: $sgpr6_sgpr7, $sgpr30_sgpr31, $vgpr1_vgpr2
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renamable $vgpr0 = V_MOV_B32_e32 8, implicit $exec
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$exec = S_OR_B64 $exec, killed renamable $sgpr6_sgpr7, implicit-def $scc
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renamable $vgpr0 = V_MOV_B32_e32 32, implicit $exec
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S_SETPC_B64_return $sgpr30_sgpr31
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...
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