forked from OSchip/llvm-project
If killed register is defined by implicit_def, do not clear it since it's live range may overlap another def of same register.
llvm-svn: 73255
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@ -214,26 +214,33 @@ void RegScavenger::forward() {
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}
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// Process uses first.
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BitVector UseRegs(NumPhysRegs);
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BitVector KillRegs(NumPhysRegs);
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for (unsigned i = 0, e = UseMOs.size(); i != e; ++i) {
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const MachineOperand MO = *UseMOs[i].first;
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unsigned Reg = MO.getReg();
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assert(isUsed(Reg) && "Using an undefined register!");
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if (MO.isKill() && !isReserved(Reg)) {
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UseRegs.set(Reg);
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// Kill of implicit_def defined registers are ignored. e.g.
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// entry: 0x2029ab8, LLVM BB @0x1b06080, ID#0:
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// Live Ins: %R0
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// %R0<def> = IMPLICIT_DEF
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// %R0<def> = IMPLICIT_DEF
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// STR %R0<kill>, %R0, %reg0, 0, 14, %reg0, Mem:ST(4,4) [0x1b06510 + 0]
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// %R1<def> = LDR %R0, %reg0, 24, 14, %reg0, Mem:LD(4,4) [0x1b065bc + 0]
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if (MO.isKill() && !isReserved(Reg) && !isImplicitlyDefined(Reg)) {
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KillRegs.set(Reg);
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// Mark sub-registers as used.
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for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
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unsigned SubReg = *SubRegs; ++SubRegs)
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UseRegs.set(SubReg);
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KillRegs.set(SubReg);
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}
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}
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// Change states of all registers after all the uses are processed to guard
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// against multiple uses.
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setUnused(UseRegs);
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setUnused(KillRegs);
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// Process early clobber defs then process defs. We can have a early clobber
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// that is dead, it should not conflict with a def that happens one "slot"
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@ -0,0 +1,77 @@
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; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin
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type { i32, i32, %struct.D_Sym**, [3 x %struct.D_Sym*] } ; type %0
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type { i32, %struct.D_Reduction** } ; type %1
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type { i32, %struct.D_RightEpsilonHint* } ; type %2
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type { i32, %struct.D_ErrorRecoveryHint* } ; type %3
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type { i32, i32, %struct.D_Reduction**, [3 x %struct.D_Reduction*] } ; type %4
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%struct.D_ErrorRecoveryHint = type { i16, i16, i8* }
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%struct.D_ParseNode = type { i32, %struct.d_loc_t, i8*, i8*, %struct.D_Scope*, void (%struct.D_Parser*, %struct.d_loc_t*, i8**)*, i8*, i8* }
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%struct.D_Parser = type { i8*, void (%struct.D_Parser*, %struct.d_loc_t*, i8**)*, %struct.D_Scope*, void (%struct.D_Parser*)*, %struct.D_ParseNode* (%struct.D_Parser*, i32, %struct.D_ParseNode**)*, void (%struct.D_ParseNode*)*, %struct.d_loc_t, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
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%struct.D_ParserTables = type { i32, %struct.D_State*, i16*, i32, i32, %struct.D_Symbol*, void (%struct.D_Parser*, %struct.d_loc_t*, i8**)*, i32, %struct.D_Pass*, i32 }
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%struct.D_Pass = type { i8*, i32, i32, i32 }
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%struct.D_Reduction = type { i16, i16, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)*, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)*, i16, i16, i32, i32, i32, i32, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)** }
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%struct.D_RightEpsilonHint = type { i16, i16, %struct.D_Reduction* }
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%struct.D_Scope = type { i8, %struct.D_Sym*, %struct.D_SymHash*, %struct.D_Sym*, %struct.D_Scope*, %struct.D_Scope*, %struct.D_Scope*, %struct.D_Scope*, %struct.D_Scope* }
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%struct.D_Shift = type { i16, i8, i8, i32, i32, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)* }
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%struct.D_State = type { i8*, i32, %1, %2, %3, %struct.D_Shift**, i32 (i8**, i32*, i32*, i16*, i32*, i8*, i32*)*, i8*, i8, i8, i8, i8*, %struct.D_Shift***, i32 }
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%struct.D_Sym = type { i8*, i32, i32, %struct.D_Sym*, %struct.D_Sym*, i32 }
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%struct.D_SymHash = type { i32, i32, %0 }
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%struct.D_Symbol = type { i32, i8*, i32 }
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%struct.PNode = type { i32, i32, i32, i32, %struct.D_Reduction*, %struct.D_Shift*, i32, %struct.VecPNode, i32, i8, i8, %struct.PNode*, %struct.PNode*, %struct.PNode*, %struct.PNode*, i8*, i8*, %struct.D_Scope*, i8*, %struct.D_ParseNode }
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%struct.PNodeHash = type { %struct.PNode**, i32, i32, i32, %struct.PNode* }
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%struct.Parser = type { %struct.D_Parser, i8*, i8*, %struct.D_ParserTables*, i32, i32, i32, i32, i32, i32, i32, %struct.PNodeHash, %struct.SNodeHash, %struct.Reduction*, %struct.Shift*, %struct.D_Scope*, %struct.SNode*, i32, %struct.Reduction*, %struct.Shift*, i32, %struct.PNode*, %struct.SNode*, %struct.ZNode*, %4, %struct.ShiftResult*, %struct.D_Shift, %struct.Parser*, i8* }
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%struct.Reduction = type { %struct.ZNode*, %struct.SNode*, %struct.D_Reduction*, %struct.SNode*, i32, %struct.Reduction* }
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%struct.SNode = type { %struct.D_State*, %struct.D_Scope*, i8*, %struct.d_loc_t, i32, %struct.PNode*, %struct.VecZNode, i32, %struct.SNode*, %struct.SNode* }
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%struct.SNodeHash = type { %struct.SNode**, i32, i32, i32, %struct.SNode*, %struct.SNode* }
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%struct.Shift = type { %struct.SNode*, %struct.Shift* }
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%struct.ShiftResult = type { %struct.D_Shift*, %struct.d_loc_t }
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%struct.VecPNode = type { i32, i32, %struct.PNode**, [3 x %struct.PNode*] }
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%struct.VecSNode = type { i32, i32, %struct.SNode**, [3 x %struct.SNode*] }
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%struct.VecZNode = type { i32, i32, %struct.ZNode**, [3 x %struct.ZNode*] }
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%struct.ZNode = type { %struct.PNode*, %struct.VecSNode }
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%struct.d_loc_t = type { i8*, i8*, i32, i32, i32 }
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declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
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define fastcc i32 @exhaustive_parse(%struct.Parser* %p, i32 %state) nounwind {
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entry:
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store i8* undef, i8** undef, align 4
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%0 = getelementptr %struct.Parser* %p, i32 0, i32 0, i32 6 ; <%struct.d_loc_t*> [#uses=1]
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%1 = bitcast %struct.d_loc_t* %0 to i8* ; <i8*> [#uses=1]
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call void @llvm.memcpy.i32(i8* undef, i8* %1, i32 20, i32 4)
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br label %bb10
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bb10: ; preds = %bb30, %bb29, %bb26, %entry
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br i1 undef, label %bb18, label %bb20
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bb18: ; preds = %bb10
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br i1 undef, label %bb20, label %bb19
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bb19: ; preds = %bb18
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br label %bb20
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bb20: ; preds = %bb19, %bb18, %bb10
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br i1 undef, label %bb21, label %bb22
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bb21: ; preds = %bb20
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unreachable
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bb22: ; preds = %bb20
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br i1 undef, label %bb24, label %bb26
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bb24: ; preds = %bb22
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unreachable
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bb26: ; preds = %bb22
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br i1 undef, label %bb10, label %bb29
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bb29: ; preds = %bb26
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br i1 undef, label %bb10, label %bb30
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bb30: ; preds = %bb29
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br i1 undef, label %bb31, label %bb10
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bb31: ; preds = %bb30
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unreachable
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}
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