forked from OSchip/llvm-project
parent
da265b8d63
commit
b68dfb45f5
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@ -197,12 +197,13 @@ def int_gcwrite : Intrinsic<[],
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def int_returnaddress : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], [IntrNoMem]>;
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def int_returnaddress : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], [IntrNoMem]>;
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def int_frameaddress : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], [IntrNoMem]>;
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def int_frameaddress : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], [IntrNoMem]>;
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// Note: we treat stacksave/stackrestore as writemem because we don't otherwise
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// Note: we treat stacksave/stackrestore and stackaddr as writemem because we
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// model their dependencies on allocas.
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// don't otherwise model their dependencies on allocas.
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def int_stacksave : Intrinsic<[llvm_ptr_ty]>,
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def int_stacksave : Intrinsic<[llvm_ptr_ty]>,
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GCCBuiltin<"__builtin_stack_save">;
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GCCBuiltin<"__builtin_stack_save">;
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def int_stackrestore : Intrinsic<[], [llvm_ptr_ty]>,
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def int_stackrestore : Intrinsic<[], [llvm_ptr_ty]>,
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GCCBuiltin<"__builtin_stack_restore">;
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GCCBuiltin<"__builtin_stack_restore">;
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def int_stackaddress : Intrinsic<[llvm_ptr_ty], []>;
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// IntrWriteArgMem is more pessimistic than strictly necessary for prefetch,
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// IntrWriteArgMem is more pessimistic than strictly necessary for prefetch,
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// however it does conveniently prevent the prefetch from being reordered
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// however it does conveniently prevent the prefetch from being reordered
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@ -3756,6 +3756,10 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
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setValue(&I, DAG.getNode(ISD::FRAMEADDR, dl, TLI.getPointerTy(),
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setValue(&I, DAG.getNode(ISD::FRAMEADDR, dl, TLI.getPointerTy(),
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getValue(I.getOperand(1))));
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getValue(I.getOperand(1))));
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return 0;
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return 0;
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case Intrinsic::stackaddress:
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setValue(&I, DAG.getNode(ISD::STACKADDR, dl, TLI.getPointerTy(), getRoot(),
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getValue(I.getOperand(1))));
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return 0;
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case Intrinsic::setjmp:
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case Intrinsic::setjmp:
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return "_setjmp"+!TLI.usesUnderscoreSetJmp();
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return "_setjmp"+!TLI.usesUnderscoreSetJmp();
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case Intrinsic::longjmp:
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case Intrinsic::longjmp:
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