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Revert r137562 because it caused PR10674 

llvm-svn: 137719
This commit is contained in:
Nadav Rotem 2011-08-16 14:34:29 +00:00
parent 719a72f34c
commit b66b866f46
1 changed files with 0 additions and 7 deletions
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7
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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@ -928,13 +928,6 @@ SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
"APInt size does not match type size!");
// In some cases the vector type is legal but the element type is illegal.
// In this case, promote the inserted value. The type does not need to match
// the vector element type. Any extra bits introduced will be
// truncated away.
if (VT.isVector())
EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);