forked from OSchip/llvm-project
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cb892e9066
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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declare i32 @callee()
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define i64 @test1(i32 %V) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), !range !0
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; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), !range !0
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; CHECK-NEXT: [[ADDCONV:%.*]] = add nuw nsw i32 [[CALL1]], [[CALL2]]
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; CHECK-NEXT: [[ADD:%.*]] = zext i32 [[ADD:%.*]]conv to i64
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; CHECK-NEXT: ret i64 [[ADD]]
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;
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%call1 = call i32 @callee(), !range !0
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%call2 = call i32 @callee(), !range !0
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%zext1 = sext i32 %call1 to i64
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%zext2 = sext i32 %call2 to i64
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%add = add i64 %zext1, %zext2
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ret i64 %add
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}
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define i64 @test2(i32 %V) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), !range !0
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; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), !range !0
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[CALL1]], [[CALL2]]
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; CHECK-NEXT: [[ZEXT1:%.*]] = zext i32 [[ADD]] to i64
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; CHECK-NEXT: ret i64 [[ZEXT1]]
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;
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%call1 = call i32 @callee(), !range !0
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%call2 = call i32 @callee(), !range !0
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%add = add i32 %call1, %call2
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%zext = sext i32 %add to i64
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ret i64 %zext
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}
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define i64 @test3(i32 %V) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), !range !0
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; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), !range !0
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; CHECK-NEXT: [[MULCONV:%.*]] = mul nuw nsw i32 [[CALL1]], [[CALL2]]
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; CHECK-NEXT: [[ADD:%.*]] = zext i32 [[MULCONV]] to i64
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; CHECK-NEXT: ret i64 [[ADD]]
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;
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%call1 = call i32 @callee(), !range !0
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%call2 = call i32 @callee(), !range !0
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%zext1 = sext i32 %call1 to i64
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%zext2 = sext i32 %call2 to i64
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%add = mul i64 %zext1, %zext2
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ret i64 %add
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}
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define i64 @test4(i32 %V) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), !range !0
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; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), !range !0
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; CHECK-NEXT: [[ADD:%.*]] = mul nuw nsw i32 [[CALL1]], [[CALL2]]
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; CHECK-NEXT: [[ZEXT1:%.*]] = zext i32 [[ADD]] to i64
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; CHECK-NEXT: ret i64 [[ZEXT1]]
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;
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%call1 = call i32 @callee(), !range !0
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%call2 = call i32 @callee(), !range !0
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%add = mul i32 %call1, %call2
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%zext = sext i32 %add to i64
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ret i64 %zext
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}
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!0 = !{ i32 0, i32 2000 }
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