forked from OSchip/llvm-project
[DAG] Move extload check in store merge. NFC.
Move candidate check from later check to initial candidate check. llvm-svn: 309698
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@ -12569,7 +12569,6 @@ void DAGCombiner::getStoreMergeCandidates(
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if (IsLoadSrc)
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if (IsLoadSrc)
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LBasePtr = BaseIndexOffset::match(
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LBasePtr = BaseIndexOffset::match(
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cast<LoadSDNode>(St->getValue())->getBasePtr(), DAG);
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cast<LoadSDNode>(St->getValue())->getBasePtr(), DAG);
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auto CandidateMatch = [&](StoreSDNode *Other, BaseIndexOffset &Ptr,
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auto CandidateMatch = [&](StoreSDNode *Other, BaseIndexOffset &Ptr,
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int64_t &Offset) -> bool {
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int64_t &Offset) -> bool {
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if (Other->isVolatile() || Other->isIndexed())
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if (Other->isVolatile() || Other->isIndexed())
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@ -12583,6 +12582,9 @@ void DAGCombiner::getStoreMergeCandidates(
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// The Load's Base Ptr must also match
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// The Load's Base Ptr must also match
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if (LoadSDNode *OtherLd = dyn_cast<LoadSDNode>(Other->getValue())) {
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if (LoadSDNode *OtherLd = dyn_cast<LoadSDNode>(Other->getValue())) {
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auto LPtr = BaseIndexOffset::match(OtherLd->getBasePtr(), DAG);
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auto LPtr = BaseIndexOffset::match(OtherLd->getBasePtr(), DAG);
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// We do not handle extended loads
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if (OtherLd->getExtensionType() != ISD::NON_EXTLOAD)
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return false;
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if (!(LBasePtr.equalBaseIndex(LPtr, DAG)))
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if (!(LBasePtr.equalBaseIndex(LPtr, DAG)))
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return false;
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return false;
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} else
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} else
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@ -12938,10 +12940,6 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode *St) {
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if (Ld->isVolatile() || Ld->isIndexed())
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if (Ld->isVolatile() || Ld->isIndexed())
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break;
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break;
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// We do not accept ext loads.
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if (Ld->getExtensionType() != ISD::NON_EXTLOAD)
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break;
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// The stored memory type must be the same.
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// The stored memory type must be the same.
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if (Ld->getMemoryVT() != MemVT)
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if (Ld->getMemoryVT() != MemVT)
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break;
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break;
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