forked from OSchip/llvm-project
tsan: do not allocate sync vars on relaxed atomic operations
helps to reduce memory consumption if an atomic is used only with relaxed ops (stats) llvm-svn: 177381
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@ -290,16 +290,20 @@ static void AtomicStore(ThreadState *thr, uptr pc, volatile T *a, T v,
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template<typename T, T (*F)(volatile T *v, T op)>
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template<typename T, T (*F)(volatile T *v, T op)>
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static T AtomicRMW(ThreadState *thr, uptr pc, volatile T *a, T v, morder mo) {
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static T AtomicRMW(ThreadState *thr, uptr pc, volatile T *a, T v, morder mo) {
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MemoryWriteAtomic(thr, pc, (uptr)a, SizeLog<T>());
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MemoryWriteAtomic(thr, pc, (uptr)a, SizeLog<T>());
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SyncVar *s = CTX()->synctab.GetOrCreateAndLock(thr, pc, (uptr)a, true);
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SyncVar *s = 0;
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thr->clock.set(thr->tid, thr->fast_state.epoch());
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if (mo != mo_relaxed) {
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if (IsAcqRelOrder(mo))
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s = CTX()->synctab.GetOrCreateAndLock(thr, pc, (uptr)a, true);
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thr->clock.acq_rel(&s->clock);
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thr->clock.set(thr->tid, thr->fast_state.epoch());
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else if (IsReleaseOrder(mo))
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if (IsAcqRelOrder(mo))
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thr->clock.release(&s->clock);
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thr->clock.acq_rel(&s->clock);
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else if (IsAcquireOrder(mo))
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else if (IsReleaseOrder(mo))
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thr->clock.acquire(&s->clock);
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thr->clock.release(&s->clock);
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else if (IsAcquireOrder(mo))
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thr->clock.acquire(&s->clock);
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}
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v = F(a, v);
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v = F(a, v);
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s->mtx.Unlock();
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if (s)
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s->mtx.Unlock();
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return v;
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return v;
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}
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}
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@ -350,17 +354,21 @@ static bool AtomicCAS(ThreadState *thr, uptr pc,
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volatile T *a, T *c, T v, morder mo, morder fmo) {
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volatile T *a, T *c, T v, morder mo, morder fmo) {
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(void)fmo; // Unused because llvm does not pass it yet.
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(void)fmo; // Unused because llvm does not pass it yet.
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MemoryWriteAtomic(thr, pc, (uptr)a, SizeLog<T>());
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MemoryWriteAtomic(thr, pc, (uptr)a, SizeLog<T>());
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SyncVar *s = CTX()->synctab.GetOrCreateAndLock(thr, pc, (uptr)a, true);
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SyncVar *s = 0;
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thr->clock.set(thr->tid, thr->fast_state.epoch());
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if (mo != mo_relaxed) {
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if (IsAcqRelOrder(mo))
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s = CTX()->synctab.GetOrCreateAndLock(thr, pc, (uptr)a, true);
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thr->clock.acq_rel(&s->clock);
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thr->clock.set(thr->tid, thr->fast_state.epoch());
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else if (IsReleaseOrder(mo))
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if (IsAcqRelOrder(mo))
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thr->clock.release(&s->clock);
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thr->clock.acq_rel(&s->clock);
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else if (IsAcquireOrder(mo))
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else if (IsReleaseOrder(mo))
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thr->clock.acquire(&s->clock);
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thr->clock.release(&s->clock);
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else if (IsAcquireOrder(mo))
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thr->clock.acquire(&s->clock);
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}
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T cc = *c;
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T cc = *c;
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T pr = func_cas(a, cc, v);
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T pr = func_cas(a, cc, v);
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s->mtx.Unlock();
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if (s)
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s->mtx.Unlock();
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if (pr == cc)
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if (pr == cc)
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return true;
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return true;
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*c = pr;
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*c = pr;
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