forked from OSchip/llvm-project
[clang][SveEmitter] SVE builtins for `svusdot` and `svsudot` ACLE.
Summary: Intrinsics, guarded by `__ARM_FEATURE_SVE_MATMUL_INT8`: * svusdot[_s32] * svusdot[_n_s32] * svusdot_lane[_s32] * svsudot[_s32] * svsudot[_n_s32] * svsudot_lane[_s32] Reviewers: sdesmalen, efriedma, david-arm, rengolin Subscribers: tschuett, kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D79877
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@ -244,6 +244,7 @@ namespace clang {
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bool isAppendSVALL() const { return Flags & IsAppendSVALL; }
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bool isInsertOp1SVALL() const { return Flags & IsInsertOp1SVALL; }
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bool isGatherPrefetch() const { return Flags & IsGatherPrefetch; }
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bool isReverseUSDOT() const { return Flags & ReverseUSDOT; }
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uint64_t getBits() const { return Flags; }
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bool isFlagSet(uint64_t Flag) const { return Flags & Flag; }
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@ -68,6 +68,7 @@
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// a: scalar of element type (splat to vector type)
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// R: scalar of 1/2 width element type (splat to vector type)
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// r: scalar of 1/4 width element type (splat to vector type)
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// @: unsigned scalar of 1/4 width element type (splat to vector type)
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// e: 1/2 width unsigned elements, 2x element count
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// b: 1/4 width unsigned elements, 4x element count
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// h: 1/2 width elements, 2x element count
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@ -196,6 +197,7 @@ def IsInsertOp1SVALL : FlagType<0x04000000>; // Inserts SV_ALL as the s
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def IsPrefetch : FlagType<0x08000000>; // Contiguous prefetches.
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def IsGatherPrefetch : FlagType<0x10000000>;
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def ReverseCompare : FlagType<0x20000000>; // Compare operands must be swapped.
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def ReverseUSDOT : FlagType<0x40000000>; // Unsigned/signed operands must be swapped.
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// These must be kept in sync with the flags in include/clang/Basic/TargetBuiltins.h
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class ImmCheckType<int val> {
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@ -1240,6 +1242,14 @@ let ArchGuard = "defined(__ARM_FEATURE_SVE_MATMUL_INT8)" in {
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def SVMLLA_S32 : SInst<"svmmla[_s32]", "ddqq","i", MergeNone, "aarch64_sve_smmla">;
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def SVMLLA_U32 : SInst<"svmmla[_u32]", "ddqq","Ui", MergeNone, "aarch64_sve_ummla">;
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def SVUSMLLA_S32 : SInst<"svusmmla[_s32]", "ddbq","i", MergeNone, "aarch64_sve_usmmla">;
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def SVUSDOT_S : SInst<"svusdot[_s32]", "ddbq", "i", MergeNone, "aarch64_sve_usdot">;
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def SVUSDOT_N_S : SInst<"svusdot[_n_s32]", "ddbr", "i", MergeNone, "aarch64_sve_usdot">;
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def SVSUDOT_S : SInst<"svsudot[_s32]", "ddqb", "i", MergeNone, "aarch64_sve_usdot", [ReverseUSDOT]>;
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def SVSUDOT_N_S : SInst<"svsudot[_n_s32]", "ddq@", "i", MergeNone, "aarch64_sve_usdot", [ReverseUSDOT]>;
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def SVUSDOT_LANE_S : SInst<"svusdot_lane[_s32]", "ddbqi", "i", MergeNone, "aarch64_sve_usdot_lane", [], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>;
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def SVSUDOT_LANE_S : SInst<"svsudot_lane[_s32]", "ddqbi", "i", MergeNone, "aarch64_sve_sudot_lane", [], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>;
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}
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let ArchGuard = "defined(__ARM_FEATURE_SVE_MATMUL_FP32)" in {
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@ -8040,6 +8040,9 @@ Value *CodeGenFunction::EmitAArch64SVEBuiltinExpr(unsigned BuiltinID,
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if (TypeFlags.isReverseCompare())
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std::swap(Ops[1], Ops[2]);
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if (TypeFlags.isReverseUSDOT())
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std::swap(Ops[1], Ops[2]);
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// Predicated intrinsics with _z suffix need a select w/ zeroinitializer.
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if (TypeFlags.getMergeType() == SVETypeFlags::MergeZero) {
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llvm::Type *OpndTy = Ops[1]->getType();
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@ -0,0 +1,54 @@
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// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_MATMUL_INT8 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_MATMUL_INT8 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
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#include <arm_sve.h>
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#ifdef SVE_OVERLOADED_FORMS
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// A simple used,unused... macro, long enough to represent any SVE builtin.
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#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
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#else
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#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
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#endif
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svint32_t test_svsudot_s32(svint32_t x, svint8_t y, svuint8_t z) {
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// CHECK-LABEL: test_svsudot_s32
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// CHECK: %[[RET:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.usdot.nxv4i32(<vscale x 4 x i32> %x, <vscale x 16 x i8> %z, <vscale x 16 x i8> %y)
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// CHECK: ret <vscale x 4 x i32> %[[RET]]
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return SVE_ACLE_FUNC(svsudot, _s32, , )(x, y, z);
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}
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svint32_t test_svsudot_n_s32(svint32_t x, svint8_t y, uint8_t z) {
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// CHECK-LABEL: test_svsudot_n_s32
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// CHECK: %[[SPLAT:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %z)
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// CHECK: %[[RET:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.usdot.nxv4i32(<vscale x 4 x i32> %x, <vscale x 16 x i8> %[[SPLAT]], <vscale x 16 x i8> %y)
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// CHECK: ret <vscale x 4 x i32> %[[RET]]
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return SVE_ACLE_FUNC(svsudot, _n_s32, , )(x, y, z);
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}
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svint32_t test_svsudot_lane_s32_0(svint32_t x, svint8_t y, svuint8_t z) {
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// CHECK-LABEL: test_svsudot_lane_s32_0
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// CHECK: %[[RET:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> %x, <vscale x 16 x i8> %y, <vscale x 16 x i8> %z, i32 0)
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// CHECK: ret <vscale x 4 x i32> %[[RET]]
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return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 0);
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}
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svint32_t test_svsudot_lane_s32_1(svint32_t x, svint8_t y, svuint8_t z) {
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// CHECK-LABEL: test_svsudot_lane_s32_1
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// CHECK: %[[RET:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> %x, <vscale x 16 x i8> %y, <vscale x 16 x i8> %z, i32 1)
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// CHECK: ret <vscale x 4 x i32> %[[RET]]
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return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 1);
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}
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svint32_t test_svsudot_lane_s32_2(svint32_t x, svint8_t y, svuint8_t z) {
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// CHECK-LABEL: test_svsudot_lane_s32_2
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// CHECK: %[[RET:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> %x, <vscale x 16 x i8> %y, <vscale x 16 x i8> %z, i32 2)
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// CHECK: ret <vscale x 4 x i32> %[[RET]]
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return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 2);
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}
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svint32_t test_svsudot_lane_s32_3(svint32_t x, svint8_t y, svuint8_t z) {
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// CHECK-LABEL: test_svsudot_lane_s32_3
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// CHECK: %[[RET:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> %x, <vscale x 16 x i8> %y, <vscale x 16 x i8> %z, i32 3)
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// CHECK: ret <vscale x 4 x i32> %[[RET]]
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return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 3);
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}
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@ -0,0 +1,54 @@
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// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_MATMUL_INT8 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_MATMUL_INT8 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
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#include <arm_sve.h>
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#ifdef SVE_OVERLOADED_FORMS
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// A simple used,unused... macro, long enough to represent any SVE builtin.
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#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
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#else
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#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
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#endif
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svint32_t test_svusdot_s32(svint32_t x, svuint8_t y, svint8_t z) {
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// CHECK-LABEL: test_svusdot_s32
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// CHECK: %[[RET:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.usdot.nxv4i32(<vscale x 4 x i32> %x, <vscale x 16 x i8> %y, <vscale x 16 x i8> %z)
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// CHECK: ret <vscale x 4 x i32> %[[RET]]
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return SVE_ACLE_FUNC(svusdot, _s32, , )(x, y, z);
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}
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svint32_t test_svusdot_n_s32(svint32_t x, svuint8_t y, int8_t z) {
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// CHECK-LABEL: test_svusdot_n_s32
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// CHECK: %[[SPLAT:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %z)
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// CHECK: %[[RET:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.usdot.nxv4i32(<vscale x 4 x i32> %x, <vscale x 16 x i8> %y, <vscale x 16 x i8> %[[SPLAT]])
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// CHECK: ret <vscale x 4 x i32> %[[RET]]
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return SVE_ACLE_FUNC(svusdot, _n_s32, , )(x, y, z);
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}
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svint32_t test_svusdot_lane_s32_0(svint32_t x, svuint8_t y, svint8_t z) {
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// CHECK-LABEL: test_svusdot_lane_s32_0
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// CHECK: %[[RET:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.usdot.lane.nxv4i32(<vscale x 4 x i32> %x, <vscale x 16 x i8> %y, <vscale x 16 x i8> %z, i32 0)
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// CHECK: ret <vscale x 4 x i32> %[[RET]]
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return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 0);
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}
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svint32_t test_svusdot_lane_s32_1(svint32_t x, svuint8_t y, svint8_t z) {
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// CHECK-LABEL: test_svusdot_lane_s32_1
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// CHECK: %[[RET:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.usdot.lane.nxv4i32(<vscale x 4 x i32> %x, <vscale x 16 x i8> %y, <vscale x 16 x i8> %z, i32 1)
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// CHECK: ret <vscale x 4 x i32> %[[RET]]
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return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 1);
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}
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svint32_t test_svusdot_lane_s32_2(svint32_t x, svuint8_t y, svint8_t z) {
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// CHECK-LABEL: test_svusdot_lane_s32_2
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// CHECK: %[[RET:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.usdot.lane.nxv4i32(<vscale x 4 x i32> %x, <vscale x 16 x i8> %y, <vscale x 16 x i8> %z, i32 2)
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// CHECK: ret <vscale x 4 x i32> %[[RET]]
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return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 2);
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}
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svint32_t test_svusdot_lane_s32_3(svint32_t x, svuint8_t y, svint8_t z) {
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// CHECK-LABEL: test_svusdot_lane_s32_3
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// CHECK: %[[RET:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.usdot.lane.nxv4i32(<vscale x 4 x i32> %x, <vscale x 16 x i8> %y, <vscale x 16 x i8> %z, i32 3)
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// CHECK: ret <vscale x 4 x i32> %[[RET]]
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return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 3);
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}
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@ -213,13 +213,13 @@ public:
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/// Return true if the intrinsic takes a splat operand.
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bool hasSplat() const {
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// These prototype modifiers are described in arm_sve.td.
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return Proto.find_first_of("ajfrKLR") != std::string::npos;
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return Proto.find_first_of("ajfrKLR@") != std::string::npos;
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}
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/// Return the parameter index of the splat operand.
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unsigned getSplatIdx() const {
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// These prototype modifiers are described in arm_sve.td.
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auto Idx = Proto.find_first_of("ajfrKLR");
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auto Idx = Proto.find_first_of("ajfrKLR@");
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assert(Idx != std::string::npos && Idx > 0 &&
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"Prototype has no splat operand");
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return Idx - 1;
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@ -541,6 +541,12 @@ void SVEType::applyModifier(char Mod) {
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ElementBitwidth /= 4;
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NumVectors = 0;
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break;
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case '@':
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Signed = false;
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Float = false;
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ElementBitwidth /= 4;
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NumVectors = 0;
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break;
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case 'K':
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Signed = true;
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Float = false;
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