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[X86] Add vector support to sub(C1, xor(X, C2)) -> add(xor(X, ~C2), C1+1) fold.

This commit is contained in:
Simon Pilgrim 2021-02-21 21:51:27 +00:00
parent 3ab32c94a4
commit b568d3d6c9
2 changed files with 6 additions and 7 deletions
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6
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -49123,8 +49123,10 @@ static SDValue combineSub(SDNode *N, SelectionDAG &DAG,
// negation into a preceding instruction. If the RHS of the sub is a XOR with
// one use and a constant, invert the immediate, saving one register.
// sub(C1, xor(X, C2)) -> add(xor(X, ~C2), C1+1)
if (Op1.getOpcode() == ISD::XOR && isa<ConstantSDNode>(Op0) &&
isa<ConstantSDNode>(Op1.getOperand(1)) && Op1->hasOneUse()) {
if (Op1.getOpcode() == ISD::XOR &&
DAG.isConstantIntBuildVectorOrConstantInt(Op0) &&
DAG.isConstantIntBuildVectorOrConstantInt(Op1.getOperand(1)) &&
Op1->hasOneUse()) {
SDLoc DL(N);
EVT VT = Op0.getValueType();
SDValue NewXor = DAG.getNode(ISD::XOR, SDLoc(Op1), VT, Op1.getOperand(0),

7
llvm/test/CodeGen/X86/combine-sub.ll
View File

@ -246,16 +246,13 @@ define <4 x i32> @combine_vec_sub_xor_consts(<4 x i32> %x) {
; SSE-LABEL: combine_vec_sub_xor_consts:
; SSE: # %bb.0:
; SSE-NEXT: pxor {{.*}}(%rip), %xmm0
; SSE-NEXT: movdqa {{.*#+}} xmm1 = [1,2,3,4]
; SSE-NEXT: psubd %xmm0, %xmm1
; SSE-NEXT: movdqa %xmm1, %xmm0
; SSE-NEXT: paddd {{.*}}(%rip), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: combine_vec_sub_xor_consts:
; AVX: # %bb.0:
; AVX-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,3,4]
; AVX-NEXT: vpsubd %xmm0, %xmm1, %xmm0
; AVX-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: retq
%xor = xor <4 x i32> %x, <i32 28, i32 29, i32 -1, i32 -31>
%sub = sub <4 x i32> <i32 1, i32 2, i32 3, i32 4>, %xor