forked from OSchip/llvm-project
don't repeat function/variable names in comments; NFC
llvm-svn: 254445
This commit is contained in:
Sanjay Patel
parent
5d1f2524a0
commit
b53791e5a7
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@ -83,21 +83,20 @@ class TwoAddressInstructionPass : public MachineFunctionPass {
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// The current basic block being processed.
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MachineBasicBlock *MBB;
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// DistanceMap - Keep track the distance of a MI from the start of the
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// current basic block.
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// Keep track the distance of a MI from the start of the current basic block.
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DenseMap<MachineInstr*, unsigned> DistanceMap;
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// Set of already processed instructions in the current block.
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SmallPtrSet<MachineInstr*, 8> Processed;
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// SrcRegMap - A map from virtual registers to physical registers which are
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// likely targets to be coalesced to due to copies from physical registers to
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// virtual registers. e.g. v1024 = move r0.
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// A map from virtual registers to physical registers which are likely targets
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// to be coalesced to due to copies from physical registers to virtual
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// registers. e.g. v1024 = move r0.
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DenseMap<unsigned, unsigned> SrcRegMap;
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// DstRegMap - A map from virtual registers to physical registers which are
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// likely targets to be coalesced to due to copies to physical registers from
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// virtual registers. e.g. r1 = move v1024.
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// A map from virtual registers to physical registers which are likely targets
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// to be coalesced to due to copies to physical registers from virtual
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// registers. e.g. r1 = move v1024.
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DenseMap<unsigned, unsigned> DstRegMap;
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bool sink3AddrInstruction(MachineInstr *MI, unsigned Reg,
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@ -165,7 +164,7 @@ public:
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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/// runOnMachineFunction - Pass entry point.
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/// Pass entry point.
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bool runOnMachineFunction(MachineFunction&) override;
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};
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} // end anonymous namespace
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@ -181,10 +180,9 @@ char &llvm::TwoAddressInstructionPassID = TwoAddressInstructionPass::ID;
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static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS);
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/// sink3AddrInstruction - A two-address instruction has been converted to a
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/// three-address instruction to avoid clobbering a register. Try to sink it
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/// past the instruction that would kill the above mentioned register to reduce
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/// register pressure.
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/// A two-address instruction has been converted to a three-address instruction
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/// to avoid clobbering a register. Try to sink it past the instruction that
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/// would kill the above mentioned register to reduce register pressure.
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bool TwoAddressInstructionPass::
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sink3AddrInstruction(MachineInstr *MI, unsigned SavedReg,
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MachineBasicBlock::iterator OldPos) {
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@ -313,8 +311,7 @@ sink3AddrInstruction(MachineInstr *MI, unsigned SavedReg,
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return true;
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}
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/// getSingleDef -- return the MachineInstr* if it is the single def of the Reg
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/// in current BB.
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/// Return the MachineInstr* if it is the single def of the Reg in current BB.
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static MachineInstr *getSingleDef(unsigned Reg, MachineBasicBlock *BB,
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const MachineRegisterInfo *MRI) {
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MachineInstr *Ret = nullptr;
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@ -352,10 +349,10 @@ bool TwoAddressInstructionPass::isRevCopyChain(unsigned FromReg, unsigned ToReg,
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return false;
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}
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/// noUseAfterLastDef - Return true if there are no intervening uses between the
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/// last instruction in the MBB that defines the specified register and the
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/// two-address instruction which is being processed. It also returns the last
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/// def location by reference
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/// Return true if there are no intervening uses between the last instruction
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/// in the MBB that defines the specified register and the two-address
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/// instruction which is being processed. It also returns the last def location
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/// by reference.
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bool TwoAddressInstructionPass::noUseAfterLastDef(unsigned Reg, unsigned Dist,
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unsigned &LastDef) {
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LastDef = 0;
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@ -376,9 +373,9 @@ bool TwoAddressInstructionPass::noUseAfterLastDef(unsigned Reg, unsigned Dist,
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return !(LastUse > LastDef && LastUse < Dist);
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}
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/// isCopyToReg - Return true if the specified MI is a copy instruction or
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/// a extract_subreg instruction. It also returns the source and destination
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/// registers and whether they are physical registers by reference.
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/// Return true if the specified MI is a copy instruction or an extract_subreg
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/// instruction. It also returns the source and destination registers and
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/// whether they are physical registers by reference.
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static bool isCopyToReg(MachineInstr &MI, const TargetInstrInfo *TII,
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unsigned &SrcReg, unsigned &DstReg,
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bool &IsSrcPhys, bool &IsDstPhys) {
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@ -398,8 +395,8 @@ static bool isCopyToReg(MachineInstr &MI, const TargetInstrInfo *TII,
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return true;
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}
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/// isPLainlyKilled - Test if the given register value, which is used by the
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// given instruction, is killed by the given instruction.
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/// Test if the given register value, which is used by the
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/// given instruction, is killed by the given instruction.
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static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg,
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LiveIntervals *LIS) {
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if (LIS && TargetRegisterInfo::isVirtualRegister(Reg) &&
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@ -425,7 +422,7 @@ static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg,
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return MI->killsRegister(Reg);
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}
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/// isKilled - Test if the given register value, which is used by the given
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/// Test if the given register value, which is used by the given
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/// instruction, is killed by the given instruction. This looks through
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/// coalescable copies to see if the original value is potentially not killed.
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///
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@ -473,8 +470,8 @@ static bool isKilled(MachineInstr &MI, unsigned Reg,
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}
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}
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/// isTwoAddrUse - Return true if the specified MI uses the specified register
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/// as a two-address use. If so, return the destination register by reference.
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/// Return true if the specified MI uses the specified register as a two-address
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/// use. If so, return the destination register by reference.
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static bool isTwoAddrUse(MachineInstr &MI, unsigned Reg, unsigned &DstReg) {
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for (unsigned i = 0, NumOps = MI.getNumOperands(); i != NumOps; ++i) {
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const MachineOperand &MO = MI.getOperand(i);
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@ -489,8 +486,8 @@ static bool isTwoAddrUse(MachineInstr &MI, unsigned Reg, unsigned &DstReg) {
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return false;
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}
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/// findOnlyInterestingUse - Given a register, if has a single in-basic block
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/// use, return the use instruction if it's a copy or a two-address use.
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/// Given a register, if has a single in-basic block use, return the use
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/// instruction if it's a copy or a two-address use.
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static
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MachineInstr *findOnlyInterestingUse(unsigned Reg, MachineBasicBlock *MBB,
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MachineRegisterInfo *MRI,
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@ -517,8 +514,8 @@ MachineInstr *findOnlyInterestingUse(unsigned Reg, MachineBasicBlock *MBB,
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return nullptr;
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}
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/// getMappedReg - Return the physical register the specified virtual register
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/// might be mapped to.
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/// Return the physical register the specified virtual register might be mapped
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/// to.
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static unsigned
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getMappedReg(unsigned Reg, DenseMap<unsigned, unsigned> &RegMap) {
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while (TargetRegisterInfo::isVirtualRegister(Reg)) {
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@ -532,8 +529,7 @@ getMappedReg(unsigned Reg, DenseMap<unsigned, unsigned> &RegMap) {
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return 0;
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}
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/// regsAreCompatible - Return true if the two registers are equal or aliased.
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///
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/// Return true if the two registers are equal or aliased.
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static bool
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regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) {
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if (RegA == RegB)
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@ -544,8 +540,8 @@ regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) {
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}
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/// isProfitableToCommute - Return true if it's potentially profitable to commute
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/// the two-address instruction that's being processed.
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/// Return true if it's potentially profitable to commute the two-address
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/// instruction that's being processed.
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bool
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TwoAddressInstructionPass::
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isProfitableToCommute(unsigned regA, unsigned regB, unsigned regC,
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@ -643,9 +639,8 @@ isProfitableToCommute(unsigned regA, unsigned regB, unsigned regC,
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return LastDefB && LastDefC && LastDefC > LastDefB;
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}
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/// commuteInstruction - Commute a two-address instruction and update the basic
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/// block, distance map, and live variables if needed. Return true if it is
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/// successful.
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/// Commute a two-address instruction and update the basic block, distance map,
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/// and live variables if needed. Return true if it is successful.
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bool TwoAddressInstructionPass::commuteInstruction(MachineInstr *MI,
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unsigned RegBIdx,
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unsigned RegCIdx,
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@ -674,8 +669,8 @@ bool TwoAddressInstructionPass::commuteInstruction(MachineInstr *MI,
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return true;
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}
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/// isProfitableToConv3Addr - Return true if it is profitable to convert the
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/// given 2-address instruction to a 3-address one.
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/// Return true if it is profitable to convert the given 2-address instruction
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/// to a 3-address one.
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bool
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TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){
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// Look for situations like this:
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@ -691,8 +686,8 @@ TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){
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return (ToRegA && !regsAreCompatible(FromRegB, ToRegA, TRI));
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}
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/// convertInstTo3Addr - Convert the specified two-address instruction into a
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/// three address one. Return true if this transformation was successful.
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/// Convert the specified two-address instruction into a three address one.
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/// Return true if this transformation was successful.
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bool
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TwoAddressInstructionPass::convertInstTo3Addr(MachineBasicBlock::iterator &mi,
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MachineBasicBlock::iterator &nmi,
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@ -733,8 +728,8 @@ TwoAddressInstructionPass::convertInstTo3Addr(MachineBasicBlock::iterator &mi,
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return true;
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}
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/// scanUses - Scan forward recursively for only uses, update maps if the use
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/// is a copy or a two-address instruction.
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/// Scan forward recursively for only uses, update maps if the use is a copy or
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/// a two-address instruction.
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void
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TwoAddressInstructionPass::scanUses(unsigned DstReg) {
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SmallVector<unsigned, 4> VirtRegPairs;
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@ -780,8 +775,8 @@ TwoAddressInstructionPass::scanUses(unsigned DstReg) {
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}
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}
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/// processCopy - If the specified instruction is not yet processed, process it
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/// if it's a copy. For a copy instruction, we find the physical registers the
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/// If the specified instruction is not yet processed, process it if it's a
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/// copy. For a copy instruction, we find the physical registers the
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/// source and destination registers might be mapped to. These are kept in
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/// point-to maps used to determine future optimizations. e.g.
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/// v1024 = mov r0
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@ -816,9 +811,9 @@ void TwoAddressInstructionPass::processCopy(MachineInstr *MI) {
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return;
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}
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/// rescheduleMIBelowKill - If there is one more local instruction that reads
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/// 'Reg' and it kills 'Reg, consider moving the instruction below the kill
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/// instruction in order to eliminate the need for the copy.
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/// If there is one more local instruction that reads 'Reg' and it kills 'Reg,
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/// consider moving the instruction below the kill instruction in order to
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/// eliminate the need for the copy.
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bool TwoAddressInstructionPass::
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rescheduleMIBelowKill(MachineBasicBlock::iterator &mi,
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MachineBasicBlock::iterator &nmi,
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@ -987,8 +982,8 @@ rescheduleMIBelowKill(MachineBasicBlock::iterator &mi,
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return true;
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}
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/// isDefTooClose - Return true if the re-scheduling will put the given
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/// instruction too close to the defs of its register dependencies.
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/// Return true if the re-scheduling will put the given instruction too close
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/// to the defs of its register dependencies.
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bool TwoAddressInstructionPass::isDefTooClose(unsigned Reg, unsigned Dist,
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MachineInstr *MI) {
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for (MachineInstr &DefMI : MRI->def_instructions(Reg)) {
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@ -1007,10 +1002,9 @@ bool TwoAddressInstructionPass::isDefTooClose(unsigned Reg, unsigned Dist,
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return false;
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}
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/// rescheduleKillAboveMI - If there is one more local instruction that reads
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/// 'Reg' and it kills 'Reg, consider moving the kill instruction above the
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/// current two-address instruction in order to eliminate the need for the
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/// copy.
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/// If there is one more local instruction that reads 'Reg' and it kills 'Reg,
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/// consider moving the kill instruction above the current two-address
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/// instruction in order to eliminate the need for the copy.
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bool TwoAddressInstructionPass::
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rescheduleKillAboveMI(MachineBasicBlock::iterator &mi,
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MachineBasicBlock::iterator &nmi,
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@ -1213,13 +1207,13 @@ bool TwoAddressInstructionPass::tryInstructionCommute(MachineInstr *MI,
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return false;
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}
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/// tryInstructionTransform - For the case where an instruction has a single
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/// pair of tied register operands, attempt some transformations that may
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/// either eliminate the tied operands or improve the opportunities for
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/// coalescing away the register copy. Returns true if no copy needs to be
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/// inserted to untie mi's operands (either because they were untied, or
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/// because mi was rescheduled, and will be visited again later). If the
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/// shouldOnlyCommute flag is true, only instruction commutation is attempted.
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/// For the case where an instruction has a single pair of tied register
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/// operands, attempt some transformations that may either eliminate the tied
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/// operands or improve the opportunities for coalescing away the register copy.
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/// Returns true if no copy needs to be inserted to untie mi's operands
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/// (either because they were untied, or because mi was rescheduled, and will
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/// be visited again later). If the shouldOnlyCommute flag is true, only
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/// instruction commutation is attempted.
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bool TwoAddressInstructionPass::
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tryInstructionTransform(MachineBasicBlock::iterator &mi,
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MachineBasicBlock::iterator &nmi,
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@ -1618,8 +1612,7 @@ TwoAddressInstructionPass::processTiedPairs(MachineInstr *MI,
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}
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}
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/// runOnMachineFunction - Reduce two-address instructions to two operands.
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///
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/// Reduce two-address instructions to two operands.
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bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &Func) {
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MF = &Func;
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const TargetMachine &TM = MF->getTarget();
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