forked from OSchip/llvm-project
Renumber NEON instruction formats to be consecutive.
llvm-svn: 106927
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@ -123,18 +123,18 @@ namespace ARMII {
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NGetLnFrm = 26 << FormShift,
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NSetLnFrm = 27 << FormShift,
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NDupFrm = 28 << FormShift,
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NLdStFrm = 31 << FormShift,
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N1RegModImmFrm= 32 << FormShift,
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N2RegFrm = 33 << FormShift,
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NVCVTFrm = 34 << FormShift,
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NVDupLnFrm = 35 << FormShift,
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N2RegVShLFrm = 36 << FormShift,
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N2RegVShRFrm = 37 << FormShift,
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N3RegFrm = 38 << FormShift,
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N3RegVShFrm = 39 << FormShift,
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NVExtFrm = 40 << FormShift,
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NVMulSLFrm = 41 << FormShift,
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NVTBLFrm = 42 << FormShift,
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NLdStFrm = 29 << FormShift,
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N1RegModImmFrm= 30 << FormShift,
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N2RegFrm = 31 << FormShift,
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NVCVTFrm = 32 << FormShift,
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NVDupLnFrm = 33 << FormShift,
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N2RegVShLFrm = 34 << FormShift,
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N2RegVShRFrm = 35 << FormShift,
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N3RegFrm = 36 << FormShift,
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N3RegVShFrm = 37 << FormShift,
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NVExtFrm = 38 << FormShift,
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NVMulSLFrm = 39 << FormShift,
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NVTBLFrm = 40 << FormShift,
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//===------------------------------------------------------------------===//
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// Misc flags.
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@ -55,18 +55,18 @@ def MiscFrm : Format<25>;
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def NGetLnFrm : Format<26>;
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def NSetLnFrm : Format<27>;
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def NDupFrm : Format<28>;
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def NLdStFrm : Format<31>;
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def N1RegModImmFrm: Format<32>;
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def N2RegFrm : Format<33>;
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def NVCVTFrm : Format<34>;
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def NVDupLnFrm : Format<35>;
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def N2RegVShLFrm : Format<36>;
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def N2RegVShRFrm : Format<37>;
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def N3RegFrm : Format<38>;
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def N3RegVShFrm : Format<39>;
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def NVExtFrm : Format<40>;
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def NVMulSLFrm : Format<41>;
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def NVTBLFrm : Format<42>;
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def NLdStFrm : Format<29>;
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def N1RegModImmFrm: Format<30>;
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def N2RegFrm : Format<31>;
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def NVCVTFrm : Format<32>;
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def NVDupLnFrm : Format<33>;
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def N2RegVShLFrm : Format<34>;
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def N2RegVShRFrm : Format<35>;
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def N3RegFrm : Format<36>;
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def N3RegVShFrm : Format<37>;
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def NVExtFrm : Format<38>;
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def NVMulSLFrm : Format<39>;
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def NVTBLFrm : Format<40>;
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// Misc flags.
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@ -3089,8 +3089,6 @@ static const DisassembleFP FuncPtrs[] = {
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&DisassembleNGetLnFrm,
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&DisassembleNSetLnFrm,
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&DisassembleNDupFrm,
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0,
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0,
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// VLD and VST (including one lane) Instructions.
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&DisassembleNLdSt,
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