forked from OSchip/llvm-project
parent
c582f0137e
commit
b49bf168f2
|
@ -1373,7 +1373,7 @@ SUnit *ScheduleDAGRRList::PickNodeToScheduleBottomUp() {
|
|||
Interferences.push_back(CurSU);
|
||||
}
|
||||
else {
|
||||
assert(CurSU->isPending && "Intereferences are pending");
|
||||
assert(CurSU->isPending && "Interferences are pending");
|
||||
// Update the interference with current live regs.
|
||||
LRegsPair.first->second = LRegs;
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue