forked from OSchip/llvm-project
[analyzer; alternate arrows] include logical '||' and '&&' as anchors for edges.
llvm-svn: 181359
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@ -1815,8 +1815,13 @@ const Stmt *getStmtParent(const Stmt *S, ParentMap &PM) {
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}
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static bool isConditionForTerminator(const Stmt *S, const Stmt *Cond) {
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// Note that we intentionally to do not handle || and && here.
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switch (S->getStmtClass()) {
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case Stmt::BinaryOperatorClass: {
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const BinaryOperator *BO = cast<BinaryOperator>(S);
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if (!BO->isLogicalOp())
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return false;
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return BO->getLHS() == Cond || BO->getRHS() == Cond;
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}
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case Stmt::IfStmtClass:
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return cast<IfStmt>(S)->getCond() == Cond;
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case Stmt::ForStmtClass:
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