forked from OSchip/llvm-project
[X86][SSE] Add support for lowering v8i16 binary shuffles to PACKSS/PACKUS
Missed in D38472 llvm-svn: 314916
This commit is contained in:
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@ -11511,6 +11511,11 @@ static SDValue lowerV8I16VectorShuffle(const SDLoc &DL, ArrayRef<int> Mask,
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lowerVectorShuffleWithUNPCK(DL, MVT::v8i16, Mask, V1, V2, DAG))
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return V;
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// Use dedicated pack instructions for masks that match their pattern.
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if (SDValue V = lowerVectorShuffleWithPACK(DL, MVT::v8i16, Mask, V1, V2, DAG,
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Subtarget))
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return V;
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// Try to use byte rotation instructions.
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if (SDValue Rotate = lowerVectorShuffleAsByteRotate(
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DL, MVT::v8i16, V1, V2, Mask, Subtarget, DAG))
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@ -213,15 +213,11 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32> %b, <8 x i32> %c, <8 x i32> %d) {
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; SSE2-LABEL: v8i32:
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; SSE2: # BB#0:
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; SSE2-NEXT: pcmpgtd %xmm3, %xmm1
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; SSE2-NEXT: packssdw %xmm0, %xmm1
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; SSE2-NEXT: pcmpgtd %xmm2, %xmm0
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; SSE2-NEXT: packssdw %xmm0, %xmm0
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; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; SSE2-NEXT: packssdw %xmm1, %xmm0
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; SSE2-NEXT: pcmpgtd %xmm7, %xmm5
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; SSE2-NEXT: packssdw %xmm0, %xmm5
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; SSE2-NEXT: pcmpgtd %xmm6, %xmm4
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; SSE2-NEXT: packssdw %xmm0, %xmm4
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; SSE2-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm5[0]
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; SSE2-NEXT: packssdw %xmm5, %xmm4
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; SSE2-NEXT: pand %xmm0, %xmm4
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; SSE2-NEXT: pand {{.*}}(%rip), %xmm4
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; SSE2-NEXT: packuswb %xmm4, %xmm4
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@ -232,15 +228,11 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32> %b, <8 x i32> %c, <8 x i32> %d) {
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; SSSE3-LABEL: v8i32:
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; SSSE3: # BB#0:
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; SSSE3-NEXT: pcmpgtd %xmm3, %xmm1
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; SSSE3-NEXT: packssdw %xmm0, %xmm1
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; SSSE3-NEXT: pcmpgtd %xmm2, %xmm0
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; SSSE3-NEXT: packssdw %xmm0, %xmm0
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; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; SSSE3-NEXT: packssdw %xmm1, %xmm0
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; SSSE3-NEXT: pcmpgtd %xmm7, %xmm5
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; SSSE3-NEXT: packssdw %xmm0, %xmm5
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; SSSE3-NEXT: pcmpgtd %xmm6, %xmm4
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; SSSE3-NEXT: packssdw %xmm0, %xmm4
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; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm5[0]
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; SSSE3-NEXT: packssdw %xmm5, %xmm4
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; SSSE3-NEXT: pand %xmm0, %xmm4
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; SSSE3-NEXT: pshufb {{.*#+}} xmm4 = xmm4[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
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; SSSE3-NEXT: pmovmskb %xmm4, %eax
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@ -625,31 +625,23 @@ define i16 @v16i32(<16 x i32> %a, <16 x i32> %b, <16 x i32> %c, <16 x i32> %d) {
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; SSE-LABEL: v16i32:
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; SSE: # BB#0:
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; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8
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; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm10
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; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm9
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; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm10
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; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm11
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; SSE-NEXT: pcmpgtd %xmm7, %xmm3
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; SSE-NEXT: packssdw %xmm0, %xmm3
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; SSE-NEXT: pcmpgtd %xmm6, %xmm2
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; SSE-NEXT: packssdw %xmm0, %xmm2
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; SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
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; SSE-NEXT: packssdw %xmm3, %xmm2
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; SSE-NEXT: pcmpgtd %xmm5, %xmm1
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; SSE-NEXT: packssdw %xmm0, %xmm1
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; SSE-NEXT: pcmpgtd %xmm4, %xmm0
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; SSE-NEXT: packssdw %xmm0, %xmm0
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; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; SSE-NEXT: packssdw %xmm1, %xmm0
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; SSE-NEXT: packsswb %xmm2, %xmm0
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; SSE-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm11
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; SSE-NEXT: packssdw %xmm0, %xmm11
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; SSE-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm9
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; SSE-NEXT: packssdw %xmm0, %xmm9
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; SSE-NEXT: punpcklqdq {{.*#+}} xmm9 = xmm9[0],xmm11[0]
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; SSE-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm10
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; SSE-NEXT: packssdw %xmm0, %xmm10
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; SSE-NEXT: packssdw %xmm11, %xmm10
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; SSE-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm9
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; SSE-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm8
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; SSE-NEXT: packssdw %xmm0, %xmm8
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; SSE-NEXT: punpcklqdq {{.*#+}} xmm8 = xmm8[0],xmm10[0]
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; SSE-NEXT: packsswb %xmm9, %xmm8
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; SSE-NEXT: packssdw %xmm9, %xmm8
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; SSE-NEXT: packsswb %xmm10, %xmm8
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; SSE-NEXT: pand %xmm0, %xmm8
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; SSE-NEXT: pmovmskb %xmm8, %eax
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; SSE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
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@ -468,13 +468,11 @@ define <8 x i16> @test13(<8 x i16> %x, <8 x i32> %y) nounwind {
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; SSE2-NEXT: pxor %xmm4, %xmm6
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; SSE2-NEXT: pxor %xmm4, %xmm5
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; SSE2-NEXT: pcmpgtd %xmm5, %xmm6
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; SSE2-NEXT: packssdw %xmm0, %xmm6
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; SSE2-NEXT: movdqa %xmm1, %xmm2
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; SSE2-NEXT: pxor %xmm4, %xmm2
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; SSE2-NEXT: pxor %xmm3, %xmm4
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; SSE2-NEXT: pcmpgtd %xmm4, %xmm2
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; SSE2-NEXT: packssdw %xmm0, %xmm2
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; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm6[0]
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; SSE2-NEXT: packssdw %xmm6, %xmm2
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; SSE2-NEXT: psubd %xmm1, %xmm3
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; SSE2-NEXT: pslld $16, %xmm0
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; SSE2-NEXT: psrad $16, %xmm0
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@ -487,58 +485,54 @@ define <8 x i16> @test13(<8 x i16> %x, <8 x i32> %y) nounwind {
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;
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; SSSE3-LABEL: test13:
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; SSSE3: # BB#0: # %vector.ph
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; SSSE3-NEXT: pxor %xmm4, %xmm4
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; SSSE3-NEXT: movdqa %xmm0, %xmm3
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; SSSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
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; SSSE3-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]
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; SSSE3-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,2147483648,2147483648,2147483648]
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; SSSE3-NEXT: pxor %xmm3, %xmm3
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; SSSE3-NEXT: movdqa %xmm0, %xmm4
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; SSSE3-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
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; SSSE3-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7]
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; SSSE3-NEXT: movdqa {{.*#+}} xmm3 = [2147483648,2147483648,2147483648,2147483648]
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; SSSE3-NEXT: movdqa %xmm0, %xmm5
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; SSSE3-NEXT: psubd %xmm2, %xmm0
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; SSSE3-NEXT: movdqa %xmm2, %xmm6
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; SSSE3-NEXT: pxor %xmm4, %xmm6
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; SSSE3-NEXT: pxor %xmm4, %xmm5
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; SSSE3-NEXT: pxor %xmm3, %xmm6
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; SSSE3-NEXT: pxor %xmm3, %xmm5
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; SSSE3-NEXT: pcmpgtd %xmm5, %xmm6
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; SSSE3-NEXT: packssdw %xmm0, %xmm6
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; SSSE3-NEXT: movdqa %xmm1, %xmm2
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; SSSE3-NEXT: pxor %xmm4, %xmm2
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; SSSE3-NEXT: pxor %xmm3, %xmm4
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; SSSE3-NEXT: pcmpgtd %xmm4, %xmm2
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; SSSE3-NEXT: packssdw %xmm0, %xmm2
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; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm6[0]
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; SSSE3-NEXT: psubd %xmm1, %xmm3
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; SSSE3-NEXT: pxor %xmm3, %xmm2
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; SSSE3-NEXT: pxor %xmm4, %xmm3
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; SSSE3-NEXT: pcmpgtd %xmm3, %xmm2
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; SSSE3-NEXT: packssdw %xmm6, %xmm2
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; SSSE3-NEXT: psubd %xmm1, %xmm4
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; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; SSSE3-NEXT: pshufb %xmm1, %xmm0
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; SSSE3-NEXT: pshufb %xmm1, %xmm3
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; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm0[0]
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; SSSE3-NEXT: pandn %xmm3, %xmm2
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; SSSE3-NEXT: pshufb %xmm1, %xmm4
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; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm0[0]
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; SSSE3-NEXT: pandn %xmm4, %xmm2
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; SSSE3-NEXT: movdqa %xmm2, %xmm0
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; SSSE3-NEXT: retq
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;
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; SSE41-LABEL: test13:
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; SSE41: # BB#0: # %vector.ph
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; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
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; SSE41-NEXT: pmovzxwd {{.*#+}} xmm4 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero
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; SSE41-NEXT: pmovzxwd {{.*#+}} xmm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
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; SSE41-NEXT: pmovzxwd {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero
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; SSE41-NEXT: pmovzxwd {{.*#+}} xmm4 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
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; SSE41-NEXT: movdqa {{.*#+}} xmm5 = [2147483648,2147483648,2147483648,2147483648]
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; SSE41-NEXT: movdqa %xmm3, %xmm6
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; SSE41-NEXT: psubd %xmm1, %xmm3
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; SSE41-NEXT: movdqa %xmm4, %xmm6
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; SSE41-NEXT: psubd %xmm1, %xmm4
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; SSE41-NEXT: movdqa %xmm1, %xmm0
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; SSE41-NEXT: pxor %xmm5, %xmm0
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; SSE41-NEXT: pxor %xmm5, %xmm6
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; SSE41-NEXT: pcmpgtd %xmm6, %xmm0
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; SSE41-NEXT: packssdw %xmm0, %xmm0
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; SSE41-NEXT: movdqa %xmm2, %xmm1
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; SSE41-NEXT: pxor %xmm5, %xmm1
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; SSE41-NEXT: pxor %xmm4, %xmm5
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; SSE41-NEXT: pxor %xmm3, %xmm5
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; SSE41-NEXT: pcmpgtd %xmm5, %xmm1
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; SSE41-NEXT: packssdw %xmm0, %xmm1
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; SSE41-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; SSE41-NEXT: psubd %xmm2, %xmm4
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; SSE41-NEXT: packssdw %xmm1, %xmm0
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; SSE41-NEXT: psubd %xmm2, %xmm3
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; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; SSE41-NEXT: pshufb %xmm1, %xmm3
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; SSE41-NEXT: pshufb %xmm1, %xmm4
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; SSE41-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0]
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; SSE41-NEXT: pandn %xmm3, %xmm0
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; SSE41-NEXT: pshufb %xmm1, %xmm3
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; SSE41-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm3[0]
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; SSE41-NEXT: pandn %xmm4, %xmm0
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; SSE41-NEXT: retq
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;
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; AVX1-LABEL: test13:
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@ -861,13 +855,11 @@ define <8 x i16> @test15(<8 x i16> %x, <8 x i32> %y) nounwind {
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; SSE2-NEXT: pxor %xmm4, %xmm2
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; SSE2-NEXT: pxor %xmm4, %xmm5
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; SSE2-NEXT: pcmpgtd %xmm2, %xmm5
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; SSE2-NEXT: packssdw %xmm0, %xmm5
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; SSE2-NEXT: movdqa %xmm1, %xmm2
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; SSE2-NEXT: pxor %xmm4, %xmm2
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; SSE2-NEXT: pxor %xmm0, %xmm4
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; SSE2-NEXT: pcmpgtd %xmm2, %xmm4
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; SSE2-NEXT: packssdw %xmm0, %xmm4
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; SSE2-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm5[0]
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; SSE2-NEXT: packssdw %xmm5, %xmm4
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; SSE2-NEXT: psubd %xmm1, %xmm0
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; SSE2-NEXT: pslld $16, %xmm3
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; SSE2-NEXT: psrad $16, %xmm3
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; SSSE3-NEXT: pxor %xmm4, %xmm2
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; SSSE3-NEXT: pxor %xmm4, %xmm5
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; SSSE3-NEXT: pcmpgtd %xmm2, %xmm5
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; SSSE3-NEXT: packssdw %xmm0, %xmm5
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; SSSE3-NEXT: movdqa %xmm1, %xmm2
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; SSSE3-NEXT: pxor %xmm4, %xmm2
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; SSSE3-NEXT: pxor %xmm3, %xmm4
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; SSSE3-NEXT: pcmpgtd %xmm2, %xmm4
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; SSSE3-NEXT: packssdw %xmm0, %xmm4
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; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm5[0]
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; SSSE3-NEXT: packssdw %xmm5, %xmm4
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; SSSE3-NEXT: psubd %xmm1, %xmm3
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; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; SSSE3-NEXT: pshufb %xmm1, %xmm0
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; SSE41-NEXT: pxor %xmm4, %xmm1
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; SSE41-NEXT: pxor %xmm4, %xmm5
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; SSE41-NEXT: pcmpgtd %xmm1, %xmm5
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; SSE41-NEXT: packssdw %xmm0, %xmm5
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; SSE41-NEXT: movdqa %xmm2, %xmm1
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; SSE41-NEXT: pxor %xmm4, %xmm1
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; SSE41-NEXT: pxor %xmm3, %xmm4
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; SSE41-NEXT: pcmpgtd %xmm1, %xmm4
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; SSE41-NEXT: packssdw %xmm0, %xmm4
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; SSE41-NEXT: punpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm4[0]
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; SSE41-NEXT: packssdw %xmm4, %xmm5
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; SSE41-NEXT: psubd %xmm2, %xmm3
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; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; SSE41-NEXT: pshufb %xmm1, %xmm0
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@ -1001,13 +989,11 @@ define <8 x i16> @test16(<8 x i16> %x, <8 x i32> %y) nounwind {
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; SSE2-NEXT: pxor %xmm4, %xmm2
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; SSE2-NEXT: pxor %xmm4, %xmm5
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; SSE2-NEXT: pcmpgtd %xmm2, %xmm5
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; SSE2-NEXT: packssdw %xmm0, %xmm5
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; SSE2-NEXT: movdqa %xmm1, %xmm2
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; SSE2-NEXT: pxor %xmm4, %xmm2
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; SSE2-NEXT: pxor %xmm0, %xmm4
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; SSE2-NEXT: pcmpgtd %xmm2, %xmm4
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; SSE2-NEXT: packssdw %xmm0, %xmm4
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; SSE2-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm5[0]
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; SSE2-NEXT: packssdw %xmm5, %xmm4
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; SSE2-NEXT: psubd %xmm1, %xmm0
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; SSE2-NEXT: pslld $16, %xmm3
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; SSE2-NEXT: psrad $16, %xmm3
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@ -1029,13 +1015,11 @@ define <8 x i16> @test16(<8 x i16> %x, <8 x i32> %y) nounwind {
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; SSSE3-NEXT: pxor %xmm4, %xmm2
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; SSSE3-NEXT: pxor %xmm4, %xmm5
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; SSSE3-NEXT: pcmpgtd %xmm2, %xmm5
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; SSSE3-NEXT: packssdw %xmm0, %xmm5
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; SSSE3-NEXT: movdqa %xmm1, %xmm2
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; SSSE3-NEXT: pxor %xmm4, %xmm2
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; SSSE3-NEXT: pxor %xmm3, %xmm4
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; SSSE3-NEXT: pcmpgtd %xmm2, %xmm4
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; SSSE3-NEXT: packssdw %xmm0, %xmm4
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; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm5[0]
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; SSSE3-NEXT: packssdw %xmm5, %xmm4
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; SSSE3-NEXT: psubd %xmm1, %xmm3
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; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; SSSE3-NEXT: pshufb %xmm1, %xmm0
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@ -1056,13 +1040,11 @@ define <8 x i16> @test16(<8 x i16> %x, <8 x i32> %y) nounwind {
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; SSE41-NEXT: pxor %xmm4, %xmm1
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; SSE41-NEXT: pxor %xmm4, %xmm5
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; SSE41-NEXT: pcmpgtd %xmm1, %xmm5
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; SSE41-NEXT: packssdw %xmm0, %xmm5
|
||||
; SSE41-NEXT: movdqa %xmm2, %xmm1
|
||||
; SSE41-NEXT: pxor %xmm4, %xmm1
|
||||
; SSE41-NEXT: pxor %xmm3, %xmm4
|
||||
; SSE41-NEXT: pcmpgtd %xmm1, %xmm4
|
||||
; SSE41-NEXT: packssdw %xmm0, %xmm4
|
||||
; SSE41-NEXT: punpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm4[0]
|
||||
; SSE41-NEXT: packssdw %xmm4, %xmm5
|
||||
; SSE41-NEXT: psubd %xmm2, %xmm3
|
||||
; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
|
||||
; SSE41-NEXT: pshufb %xmm1, %xmm0
|
||||
|
|
|
@ -3405,26 +3405,18 @@ define <32 x i1> @test_cmp_v32i32(<32 x i32> %a0, <32 x i32> %a1) nounwind {
|
|||
; SSE2-LABEL: test_cmp_v32i32:
|
||||
; SSE2: # BB#0:
|
||||
; SSE2-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm3
|
||||
; SSE2-NEXT: packssdw %xmm0, %xmm3
|
||||
; SSE2-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm2
|
||||
; SSE2-NEXT: packssdw %xmm0, %xmm2
|
||||
; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
|
||||
; SSE2-NEXT: packssdw %xmm3, %xmm2
|
||||
; SSE2-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm1
|
||||
; SSE2-NEXT: packssdw %xmm0, %xmm1
|
||||
; SSE2-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm0
|
||||
; SSE2-NEXT: packssdw %xmm0, %xmm0
|
||||
; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
|
||||
; SSE2-NEXT: packssdw %xmm1, %xmm0
|
||||
; SSE2-NEXT: packsswb %xmm2, %xmm0
|
||||
; SSE2-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm7
|
||||
; SSE2-NEXT: packssdw %xmm0, %xmm7
|
||||
; SSE2-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm6
|
||||
; SSE2-NEXT: packssdw %xmm0, %xmm6
|
||||
; SSE2-NEXT: punpcklqdq {{.*#+}} xmm6 = xmm6[0],xmm7[0]
|
||||
; SSE2-NEXT: packssdw %xmm7, %xmm6
|
||||
; SSE2-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm5
|
||||
; SSE2-NEXT: packssdw %xmm0, %xmm5
|
||||
; SSE2-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm4
|
||||
; SSE2-NEXT: packssdw %xmm0, %xmm4
|
||||
; SSE2-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm5[0]
|
||||
; SSE2-NEXT: packssdw %xmm5, %xmm4
|
||||
; SSE2-NEXT: packsswb %xmm6, %xmm4
|
||||
; SSE2-NEXT: movdqa %xmm4, -{{[0-9]+}}(%rsp)
|
||||
; SSE2-NEXT: movb -{{[0-9]+}}(%rsp), %al
|
||||
|
@ -3529,121 +3521,107 @@ define <32 x i1> @test_cmp_v32i32(<32 x i32> %a0, <32 x i32> %a1) nounwind {
|
|||
;
|
||||
; SSE42-LABEL: test_cmp_v32i32:
|
||||
; SSE42: # BB#0:
|
||||
; SSE42-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm3
|
||||
; SSE42-NEXT: packssdw %xmm0, %xmm3
|
||||
; SSE42-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm2
|
||||
; SSE42-NEXT: packssdw %xmm0, %xmm2
|
||||
; SSE42-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
|
||||
; SSE42-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm1
|
||||
; SSE42-NEXT: packssdw %xmm0, %xmm1
|
||||
; SSE42-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm0
|
||||
; SSE42-NEXT: packssdw %xmm0, %xmm0
|
||||
; SSE42-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
|
||||
; SSE42-NEXT: packsswb %xmm2, %xmm0
|
||||
; SSE42-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm7
|
||||
; SSE42-NEXT: packssdw %xmm0, %xmm7
|
||||
; SSE42-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm6
|
||||
; SSE42-NEXT: packssdw %xmm0, %xmm6
|
||||
; SSE42-NEXT: punpcklqdq {{.*#+}} xmm6 = xmm6[0],xmm7[0]
|
||||
; SSE42-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm5
|
||||
; SSE42-NEXT: packssdw %xmm0, %xmm5
|
||||
; SSE42-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm1
|
||||
; SSE42-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm2
|
||||
; SSE42-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm3
|
||||
; SSE42-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm4
|
||||
; SSE42-NEXT: packssdw %xmm0, %xmm4
|
||||
; SSE42-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm5[0]
|
||||
; SSE42-NEXT: packsswb %xmm6, %xmm4
|
||||
; SSE42-NEXT: pextrb $15, %xmm4, %eax
|
||||
; SSE42-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm5
|
||||
; SSE42-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm6
|
||||
; SSE42-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm7
|
||||
; SSE42-NEXT: pextrb $12, %xmm7, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $14, %xmm4, %eax
|
||||
; SSE42-NEXT: pextrb $8, %xmm7, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $13, %xmm4, %eax
|
||||
; SSE42-NEXT: pextrb $4, %xmm7, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $0, %xmm7, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $12, %xmm6, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $8, %xmm6, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $4, %xmm6, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $0, %xmm6, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $12, %xmm5, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $8, %xmm5, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $4, %xmm5, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $0, %xmm5, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $12, %xmm4, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $11, %xmm4, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $10, %xmm4, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $9, %xmm4, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $8, %xmm4, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $7, %xmm4, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $6, %xmm4, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $5, %xmm4, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $4, %xmm4, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $3, %xmm4, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $2, %xmm4, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $1, %xmm4, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $0, %xmm4, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $15, %xmm0, %eax
|
||||
; SSE42-NEXT: pextrb $12, %xmm3, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $14, %xmm0, %eax
|
||||
; SSE42-NEXT: pextrb $8, %xmm3, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $13, %xmm0, %eax
|
||||
; SSE42-NEXT: pextrb $4, %xmm3, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $0, %xmm3, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $12, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $8, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $4, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $0, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $12, %xmm1, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $8, %xmm1, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $4, %xmm1, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $0, %xmm1, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $12, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $11, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $10, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $9, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $8, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $7, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $6, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $5, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $4, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $3, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $2, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $1, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $0, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
|
|
|
@ -385,30 +385,12 @@ entry:
|
|||
}
|
||||
|
||||
define <8 x i16> @trunc8i32_8i16_ashr(<8 x i32> %a) {
|
||||
; SSE2-LABEL: trunc8i32_8i16_ashr:
|
||||
; SSE2: # BB#0: # %entry
|
||||
; SSE2-NEXT: psrad $16, %xmm1
|
||||
; SSE2-NEXT: psrad $16, %xmm0
|
||||
; SSE2-NEXT: packssdw %xmm1, %xmm0
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
; SSSE3-LABEL: trunc8i32_8i16_ashr:
|
||||
; SSSE3: # BB#0: # %entry
|
||||
; SSSE3-NEXT: psrad $16, %xmm0
|
||||
; SSSE3-NEXT: psrad $16, %xmm1
|
||||
; SSSE3-NEXT: packssdw %xmm0, %xmm1
|
||||
; SSSE3-NEXT: packssdw %xmm0, %xmm0
|
||||
; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
|
||||
; SSSE3-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: trunc8i32_8i16_ashr:
|
||||
; SSE41: # BB#0: # %entry
|
||||
; SSE41-NEXT: psrad $16, %xmm0
|
||||
; SSE41-NEXT: psrad $16, %xmm1
|
||||
; SSE41-NEXT: packssdw %xmm0, %xmm1
|
||||
; SSE41-NEXT: packssdw %xmm0, %xmm0
|
||||
; SSE41-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
|
||||
; SSE41-NEXT: retq
|
||||
; SSE-LABEL: trunc8i32_8i16_ashr:
|
||||
; SSE: # BB#0: # %entry
|
||||
; SSE-NEXT: psrad $16, %xmm1
|
||||
; SSE-NEXT: psrad $16, %xmm0
|
||||
; SSE-NEXT: packssdw %xmm1, %xmm0
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX1-LABEL: trunc8i32_8i16_ashr:
|
||||
; AVX1: # BB#0: # %entry
|
||||
|
@ -487,11 +469,9 @@ define <8 x i16> @trunc8i32_8i16_lshr(<8 x i32> %a) {
|
|||
;
|
||||
; SSE41-LABEL: trunc8i32_8i16_lshr:
|
||||
; SSE41: # BB#0: # %entry
|
||||
; SSE41-NEXT: psrld $16, %xmm0
|
||||
; SSE41-NEXT: psrld $16, %xmm1
|
||||
; SSE41-NEXT: packusdw %xmm0, %xmm1
|
||||
; SSE41-NEXT: packusdw %xmm0, %xmm0
|
||||
; SSE41-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
|
||||
; SSE41-NEXT: psrld $16, %xmm0
|
||||
; SSE41-NEXT: packusdw %xmm1, %xmm0
|
||||
; SSE41-NEXT: retq
|
||||
;
|
||||
; AVX1-LABEL: trunc8i32_8i16_lshr:
|
||||
|
|
Loading…
Reference in New Issue