forked from OSchip/llvm-project
Rename some variables to have meaningful names. NFC.
llvm-svn: 280391
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@ -2838,51 +2838,51 @@ void DAGTypeLegalizer::IntegerExpandSetCCOperands(SDValue &NewLHS,
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case ISD::SETUGE: LowCC = ISD::SETUGE; break;
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}
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// Tmp1 = lo(op1) < lo(op2) // Always unsigned comparison
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// Tmp2 = hi(op1) < hi(op2) // Signedness depends on operands
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// dest = hi(op1) == hi(op2) ? Tmp1 : Tmp2;
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// LoCmp = lo(op1) < lo(op2) // Always unsigned comparison
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// HiCmp = hi(op1) < hi(op2) // Signedness depends on operands
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// dest = hi(op1) == hi(op2) ? LoCmp : HiCmp;
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// NOTE: on targets without efficient SELECT of bools, we can always use
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// this identity: (B1 ? B2 : B3) --> (B1 & B2)|(!B1&B3)
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TargetLowering::DAGCombinerInfo DagCombineInfo(DAG, AfterLegalizeTypes, true,
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nullptr);
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SDValue Tmp1, Tmp2;
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SDValue LoCmp, HiCmp;
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if (TLI.isTypeLegal(LHSLo.getValueType()) &&
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TLI.isTypeLegal(RHSLo.getValueType()))
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Tmp1 = TLI.SimplifySetCC(getSetCCResultType(LHSLo.getValueType()),
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LHSLo, RHSLo, LowCC, false, DagCombineInfo, dl);
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if (!Tmp1.getNode())
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Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()),
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LHSLo, RHSLo, LowCC);
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LoCmp = TLI.SimplifySetCC(getSetCCResultType(LHSLo.getValueType()), LHSLo,
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RHSLo, LowCC, false, DagCombineInfo, dl);
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if (!LoCmp.getNode())
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LoCmp = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()), LHSLo,
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RHSLo, LowCC);
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if (TLI.isTypeLegal(LHSHi.getValueType()) &&
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TLI.isTypeLegal(RHSHi.getValueType()))
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Tmp2 = TLI.SimplifySetCC(getSetCCResultType(LHSHi.getValueType()),
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LHSHi, RHSHi, CCCode, false, DagCombineInfo, dl);
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if (!Tmp2.getNode())
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Tmp2 = DAG.getNode(ISD::SETCC, dl,
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getSetCCResultType(LHSHi.getValueType()),
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HiCmp = TLI.SimplifySetCC(getSetCCResultType(LHSHi.getValueType()), LHSHi,
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RHSHi, CCCode, false, DagCombineInfo, dl);
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if (!HiCmp.getNode())
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HiCmp =
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DAG.getNode(ISD::SETCC, dl, getSetCCResultType(LHSHi.getValueType()),
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LHSHi, RHSHi, DAG.getCondCode(CCCode));
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ConstantSDNode *Tmp1C = dyn_cast<ConstantSDNode>(Tmp1.getNode());
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ConstantSDNode *Tmp2C = dyn_cast<ConstantSDNode>(Tmp2.getNode());
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if ((Tmp1C && Tmp1C->isNullValue()) ||
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(Tmp2C && Tmp2C->isNullValue() &&
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(CCCode == ISD::SETLE || CCCode == ISD::SETGE ||
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CCCode == ISD::SETUGE || CCCode == ISD::SETULE)) ||
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(Tmp2C && Tmp2C->getAPIntValue() == 1 &&
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(CCCode == ISD::SETLT || CCCode == ISD::SETGT ||
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CCCode == ISD::SETUGT || CCCode == ISD::SETULT))) {
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ConstantSDNode *LoCmpC = dyn_cast<ConstantSDNode>(LoCmp.getNode());
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ConstantSDNode *HiCmpC = dyn_cast<ConstantSDNode>(HiCmp.getNode());
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if ((LoCmpC && LoCmpC->isNullValue()) ||
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(HiCmpC && HiCmpC->isNullValue() &&
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(CCCode == ISD::SETLE || CCCode == ISD::SETGE || CCCode == ISD::SETUGE ||
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CCCode == ISD::SETULE)) ||
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(HiCmpC && HiCmpC->getAPIntValue() == 1 &&
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(CCCode == ISD::SETLT || CCCode == ISD::SETGT || CCCode == ISD::SETUGT ||
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CCCode == ISD::SETULT))) {
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// low part is known false, returns high part.
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// For LE / GE, if high part is known false, ignore the low part.
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// For LT / GT, if high part is known true, ignore the low part.
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NewLHS = Tmp2;
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NewLHS = HiCmp;
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NewRHS = SDValue();
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return;
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}
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if (LHSHi == RHSHi) {
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// Comparing the low bits is enough.
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NewLHS = Tmp1;
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NewLHS = LoCmp;
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NewRHS = SDValue();
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return;
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}
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@ -2927,8 +2927,8 @@ void DAGTypeLegalizer::IntegerExpandSetCCOperands(SDValue &NewLHS,
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if (!NewLHS.getNode())
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NewLHS = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
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LHSHi, RHSHi, ISD::SETEQ);
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NewLHS = DAG.getSelect(dl, Tmp1.getValueType(),
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NewLHS, Tmp1, Tmp2);
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NewLHS = DAG.getSelect(dl, LoCmp.getValueType(),
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NewLHS, LoCmp, HiCmp);
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NewRHS = SDValue();
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}
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