forked from OSchip/llvm-project
[InstCombine] add tests for missing vector icmp folds
llvm-svn: 278632
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@ -1348,6 +1348,21 @@ define i1 @icmp_add_and_shr_ne_0(i32 %X) {
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ret i1 %tobool
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}
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; FIXME: Vectors should fold the same way.
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define <2 x i1> @icmp_add_and_shr_ne_0_vec(<2 x i32> %X) {
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; CHECK-LABEL: @icmp_add_and_shr_ne_0_vec(
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; CHECK-NEXT: [[SHR:%.*]] = lshr <2 x i32> %X, <i32 4, i32 4>
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; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[SHR]], <i32 15, i32 15>
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne <2 x i32> [[AND]], <i32 14, i32 14>
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; CHECK-NEXT: ret <2 x i1> [[TOBOOL]]
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;
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%shr = lshr <2 x i32> %X, <i32 4, i32 4>
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%and = and <2 x i32> %shr, <i32 15, i32 15>
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%add = add <2 x i32> %and, <i32 -14, i32 -14>
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%tobool = icmp ne <2 x i32> %add, zeroinitializer
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ret <2 x i1> %tobool
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}
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; PR16244
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define i1 @test71(i8* %x) {
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; CHECK-LABEL: @test71(
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@ -1732,6 +1747,22 @@ define i1 @icmp_and_or_lshr(i32 %x, i32 %y) {
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ret i1 %ret
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}
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; FIXME: Vectors should fold the same way.
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define <2 x i1> @icmp_and_or_lshr_vec(<2 x i32> %x, <2 x i32> %y) {
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; CHECK-LABEL: @icmp_and_or_lshr_vec(
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; CHECK-NEXT: [[SHF:%.*]] = lshr <2 x i32> %x, %y
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[SHF]], %x
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; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[OR]], <i32 1, i32 1>
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; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[AND]], zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[RET]]
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;
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%shf = lshr <2 x i32> %x, %y
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%or = or <2 x i32> %shf, %x
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%and = and <2 x i32> %or, <i32 1, i32 1>
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%ret = icmp ne <2 x i32> %and, zeroinitializer
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ret <2 x i1> %ret
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}
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define i1 @icmp_and_or_lshr_cst(i32 %x) {
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; CHECK-LABEL: @icmp_and_or_lshr_cst(
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; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, 3
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@ -1745,6 +1776,22 @@ define i1 @icmp_and_or_lshr_cst(i32 %x) {
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ret i1 %ret
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}
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; FIXME: Vectors should fold the same way.
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define <2 x i1> @icmp_and_or_lshr_cst_vec(<2 x i32> %x) {
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; CHECK-LABEL: @icmp_and_or_lshr_cst_vec(
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; CHECK-NEXT: [[SHF:%.*]] = lshr <2 x i32> %x, <i32 1, i32 1>
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[SHF]], %x
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; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[OR]], <i32 1, i32 1>
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; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[AND]], zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[RET]]
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;
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%shf = lshr <2 x i32> %x, <i32 1, i32 1>
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%or = or <2 x i32> %shf, %x
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%and = and <2 x i32> %or, <i32 1, i32 1>
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%ret = icmp ne <2 x i32> %and, zeroinitializer
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ret <2 x i1> %ret
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}
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define i1 @shl_ap1_zero_ap2_non_zero_2(i32 %a) {
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; CHECK-LABEL: @shl_ap1_zero_ap2_non_zero_2(
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %a, 29
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