forked from OSchip/llvm-project
[X86] Don't look for TEST instruction shrinking opportunities when the root node is a X86ISD::SUB.
I don't believe we ever create an X86ISD::SUB with a 0 constant which is what the TEST handling needs. The ternary operator at the end of this code shows up as only going one way in the llvm-cov report from the bots. llvm-svn: 324865
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@ -3064,12 +3064,7 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
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return;
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}
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case X86ISD::CMP:
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case X86ISD::SUB: {
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// Sometimes a SUB is used to perform comparison.
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if (Opcode == X86ISD::SUB && Node->hasAnyUseOfValue(0))
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// This node is not a CMP.
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break;
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case X86ISD::CMP: {
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SDValue N0 = Node->getOperand(0);
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SDValue N1 = Node->getOperand(1);
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@ -3131,10 +3126,8 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
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// Emit a testl or testw.
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SDNode *NewNode = CurDAG->getMachineNode(Op, dl, MVT::i32, Reg, Imm);
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// Replace SUB|CMP with TEST, since SUB has two outputs while TEST has
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// one, do not call ReplaceAllUsesWith.
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ReplaceUses(SDValue(Node, (Opcode == X86ISD::SUB ? 1 : 0)),
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SDValue(NewNode, 0));
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// Replace CMP with TEST.
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CurDAG->ReplaceAllUsesWith(Node, NewNode);
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CurDAG->RemoveDeadNode(Node);
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return;
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}
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